research-article

Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture

Authors:

Sang Phill Park,

Niladri Mojumder,

Anand Raghunathan,

Kaushik RoyAuthors Info & Claims

DAC '12: Proceedings of the 49th Annual Design Automation Conference

Pages 492 - 497

https://doi.org/10.1145/2228360.2228447

Published: 03 June 2012 Publication History

Abstract

Spin-transfer torque magnetic RAM (STT MRAM) has emerged as a promising candidate for on-chip memory in future computing platforms. We present a cross-layer (device-circuit-architecture) approach to energy-efficient cache design using STT MRAM. At the device and circuit levels, we consider different genres of MTJs and bitcells, and evaluate their impact on the area, energy and performance of caches. In addition, we propose micro-architectural techniques viz. sequential cache read and partial cache line update, which exploit the non-volatility of STT MRAM to further improve energy efficiency of STT MRAM caches. A detailed comparison of STT MRAM caches with SRAM-based caches is also presented. Our results indicate that the proposed optimizations significantly enhance the efficiency of STT MRAM for designing lower level caches.

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Cited By

Bagchi ADharamjeet Rishabh OSuri MPanda P(2024)POEM: Performance Optimization and Endurance Management for Non-volatile CachesACM Transactions on Design Automation of Electronic Systems10.1145/365345229:5(1-36)Online publication date: 27-Mar-2024
https://dl.acm.org/doi/10.1145/3653452
Zhou YZeng JJeong JChoi JJung C(2023)SweepCache: Intermittence-Aware Cache on the CheapProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3623781(1059-1074)Online publication date: 28-Oct-2023
https://dl.acm.org/doi/10.1145/3613424.3623781
Thakuria NElangovan RRaghunathan AGupta S(2023)Piezoelectric Strain FET (PeFET)-Based Nonvolatile MemoriesIEEE Transactions on Electron Devices10.1109/TED.2023.327084570:6(3076-3084)Online publication date: Jun-2023
https://doi.org/10.1109/TED.2023.3270845
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Index Terms

Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture
1. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory

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Published In

cover image ACM Conferences

DAC '12: Proceedings of the 49th Annual Design Automation Conference

June 2012

1357 pages

ISBN:9781450311991

DOI:10.1145/2228360

General Chair:
Patrick Groeneveld
Magma Design Automation, Inc., San Jose, CA
,
Program Chairs:
Donatella Sciuto
Politecnico di Milano, Milano, Italy
,
Soha Hassoun
Tufts Univ., Medford, MA

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

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SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 03 June 2012

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DAC '12

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DAC '12: The 49th Annual Design Automation Conference 2012

June 3 - 7, 2012

California, San Francisco

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Bagchi ADharamjeet Rishabh OSuri MPanda P(2024)POEM: Performance Optimization and Endurance Management for Non-volatile CachesACM Transactions on Design Automation of Electronic Systems10.1145/365345229:5(1-36)Online publication date: 27-Mar-2024
https://dl.acm.org/doi/10.1145/3653452
Zhou YZeng JJeong JChoi JJung C(2023)SweepCache: Intermittence-Aware Cache on the CheapProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3623781(1059-1074)Online publication date: 28-Oct-2023
https://dl.acm.org/doi/10.1145/3613424.3623781
Thakuria NElangovan RRaghunathan AGupta S(2023)Piezoelectric Strain FET (PeFET)-Based Nonvolatile MemoriesIEEE Transactions on Electron Devices10.1109/TED.2023.327084570:6(3076-3084)Online publication date: Jun-2023
https://doi.org/10.1109/TED.2023.3270845
Kudithipudi DDaram AZyarah AZohora FAimone JYanguas-Gil ASoures NNeftci EMattina MLomonaco VThiem CEpstein B(2023)Design principles for lifelong learning AI acceleratorsNature Electronics10.1038/s41928-023-01054-36:11(807-822)Online publication date: 16-Nov-2023
https://doi.org/10.1038/s41928-023-01054-3
Seo YKwon K(2022)High-Density 1R/1W Dual-Port Spin-Transfer Torque MRAMMicromachines10.3390/mi1312222413:12(2224)Online publication date: 15-Dec-2022
https://doi.org/10.3390/mi13122224
Iskandar VGhany MGöhringer D(2022)Near-memory Computing on FPGAs with 3D-stacked Memories: Applications, Architectures, and OptimizationsACM Transactions on Reconfigurable Technology and Systems10.1145/354765816:1(1-32)Online publication date: 22-Dec-2022
https://dl.acm.org/doi/10.1145/3547658
Ferdaus FBahar Talukder BRahman M(2022)Approximate MRAM: High-performance and Power-efficient Computing with MRAM Chips for Error-tolerant ApplicationsIEEE Transactions on Computers10.1109/TC.2022.3174584(1-1)Online publication date: 2022
https://doi.org/10.1109/TC.2022.3174584
Zeng JChoi JFu XShreepathi ALee DMin CJung C(2021)ReplayCache: Enabling Volatile Cachesfor Energy Harvesting SystemsMICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3466752.3480102(170-182)Online publication date: 18-Oct-2021
https://dl.acm.org/doi/10.1145/3466752.3480102
Chen JLu CNi JGuo XGirard PCheng Y(2021)DOVA PRO: A Dynamic Overwriting Voltage Adjustment Technique for STT-MRAM L1 Cache Considering Dielectric Breakdown EffectIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2021.307341529:7(1325-1334)Online publication date: Jul-2021
https://doi.org/10.1109/TVLSI.2021.3073415
Agrawal AWang CSharma TRoy K(2021)Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar ArraysIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2021.306968268:6(2281-2294)Online publication date: Jun-2021
https://doi.org/10.1109/TCSI.2021.3069682
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