research-article

Architecture support for accelerator-rich CMPs

Authors:

Mohammad Ali Ghodrat,

Beayna Grigorian,

Glenn ReinmanAuthors Info & Claims

DAC '12: Proceedings of the 49th Annual Design Automation Conference

Pages 843 - 849

https://doi.org/10.1145/2228360.2228512

Published: 03 June 2012 Publication History

Abstract

This work discusses a hardware architectural support for accelerator-rich CMPs (ARC). First, we present a hardware resource management scheme for accelerator sharing. This scheme supports sharing and arbitration of multiple cores for a common set of accelerators, and it uses a hardware-based arbitration mechanism to provide feedback to cores to indicate the wait time before a particular resource becomes available. Second, we propose a light-weight interrupt system to reduce the OS overhead of handling interrupts which occur frequently in an accelerator-rich platform. Third, we propose architectural support that allows us to compose a larger virtual accelerator out of multiple smaller accelerators. We have also implemented a complete simulation tool-chain to verify our ARC architecture. Experimental results show significant performance (on average 51X) and energy improvement (on average 17X) compared to approaches using OS-based accelerator management.

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Cited By

Kim SZhao JAsanović KNikolić BShao Y(2024)AuRORA: A Full-Stack Solution for Scalable and Virtualized Accelerator IntegrationIEEE Micro10.1109/MM.2024.340954644:4(97-105)Online publication date: 13-Jun-2024
https://dl.acm.org/doi/10.1109/MM.2024.3409546
Chiu KEichler GLin CDi Guglielmo GCarloni L(2024)WOLT: Transparent Deployment of ML Workloads on Lightweight Many-Accelerator Architectures2024 IEEE 42nd International Conference on Computer Design (ICCD)10.1109/ICCD63220.2024.00102(637-644)Online publication date: 18-Nov-2024
https://doi.org/10.1109/ICCD63220.2024.00102
Wang SXu HMamandipoor AMahapatra RAhn BGhodrati SKailas KAlian MEsmaeilzadeh H(2024)Data Motion Acceleration: Chaining Cross-Domain Multi Accelerators2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00083(1043-1062)Online publication date: 2-Mar-2024
https://doi.org/10.1109/HPCA57654.2024.00083
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Index Terms

Architecture support for accelerator-rich CMPs
1. Computer systems organization
  1. Architectures
    1. Other architectures
      1. Heterogeneous (hybrid) systems

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Information & Contributors

Information

Published In

cover image ACM Conferences

DAC '12: Proceedings of the 49th Annual Design Automation Conference

June 2012

1357 pages

ISBN:9781450311991

DOI:10.1145/2228360

General Chair:
Patrick Groeneveld
Magma Design Automation, Inc., San Jose, CA
,
Program Chairs:
Donatella Sciuto
Politecnico di Milano, Milano, Italy
,
Soha Hassoun
Tufts Univ., Medford, MA

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

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SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 03 June 2012

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DAC '12

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EDAC
SIGDA

DAC '12: The 49th Annual Design Automation Conference 2012

June 3 - 7, 2012

California, San Francisco

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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62nd ACM/IEEE Design Automation Conference

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Citations

Cited By

Kim SZhao JAsanović KNikolić BShao Y(2024)AuRORA: A Full-Stack Solution for Scalable and Virtualized Accelerator IntegrationIEEE Micro10.1109/MM.2024.340954644:4(97-105)Online publication date: 13-Jun-2024
https://dl.acm.org/doi/10.1109/MM.2024.3409546
Chiu KEichler GLin CDi Guglielmo GCarloni L(2024)WOLT: Transparent Deployment of ML Workloads on Lightweight Many-Accelerator Architectures2024 IEEE 42nd International Conference on Computer Design (ICCD)10.1109/ICCD63220.2024.00102(637-644)Online publication date: 18-Nov-2024
https://doi.org/10.1109/ICCD63220.2024.00102
Wang SXu HMamandipoor AMahapatra RAhn BGhodrati SKailas KAlian MEsmaeilzadeh H(2024)Data Motion Acceleration: Chaining Cross-Domain Multi Accelerators2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00083(1043-1062)Online publication date: 2-Mar-2024
https://doi.org/10.1109/HPCA57654.2024.00083
Kim SZhao JAsanovic KNikolic BShao Y(2023)AuRORA: Virtualized Accelerator Orchestration for Multi-Tenant WorkloadsProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3614280(62-76)Online publication date: 28-Oct-2023
https://dl.acm.org/doi/10.1145/3613424.3614280
Wei TTurtayeva NOrenes-Vera MLonkar OBalkind JAamodt TJerger NSwift M(2023)Cohort: Software-Oriented Acceleration for Heterogeneous SoCsProceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 310.1145/3582016.3582059(105-117)Online publication date: 25-Mar-2023
https://dl.acm.org/doi/10.1145/3582016.3582059
Eichler GSeyoum BChiu KCarloni L(2023)MindCrypt: The Brain as a Random Number Generator for SoC-Based Brain-Computer Interfaces2023 IEEE 41st International Conference on Computer Design (ICCD)10.1109/ICCD58817.2023.00021(70-77)Online publication date: 6-Nov-2023
https://doi.org/10.1109/ICCD58817.2023.00021
Chiu KGiri DPiccolboni LCarloni L(2023)An Analysis of Accelerator Data-Transfer Modes in NoC-Based SoC Architectures2023 IEEE High Performance Extreme Computing Conference (HPEC)10.1109/HPEC58863.2023.10363546(1-7)Online publication date: 25-Sep-2023
https://doi.org/10.1109/HPEC58863.2023.10363546
Peccerillo BCheshmikhani EMannino MMondelli ABartolini S(2023)IXIAM: ISA EXtension for Integrated Accelerator ManagementIEEE Access10.1109/ACCESS.2023.326426511(33768-33791)Online publication date: 2023
https://doi.org/10.1109/ACCESS.2023.3264265
Li WLiu TXiao ZQi HZhu WWang J(2023)TCADer: A Tightly Coupled Accelerator Design framework for heterogeneous system with hardware/software co-designJournal of Systems Architecture10.1016/j.sysarc.2023.102822136(102822)Online publication date: Mar-2023
https://doi.org/10.1016/j.sysarc.2023.102822
Zhao BPeng MWang XLiao S(2023)Accelerating OpenVX Application Kernels Using Halide SchedulingJournal of Signal Processing Systems10.1007/s11265-023-01851-195:5(623-642)Online publication date: 28-Feb-2023
https://doi.org/10.1007/s11265-023-01851-1
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