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Hardware synthesis of recursive functions through partial stream rewriting

Published: 03 June 2012 Publication History

Abstract

Current high-level synthesis tools based on C/C++ offer only limited support for recursion and functions pointers. We present a novel approach for high-level synthesis that represents the program as a term rewriting system. Based on this concept, dynamic creation of threads, parallel recursive tasks and data-dependent branching can be supported in hardware. Complex examples are used to show the effectiveness of our method.

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Cited By

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  • (2016)Supporting Static Binding in Stream Rewriting for Heterogeneous Many-Core Architectures2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)10.1109/MCSoC.2016.26(273-280)Online publication date: Sep-2016
  • (2015)Hardware synthesis from a recursive functional languageProceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis10.5555/2830840.2830850(83-93)Online publication date: 4-Oct-2015
  • (2015)New Design of the Combined Balance Control SystemProceedings of the 6th International Asia Conference on Industrial Engineering and Management Innovation10.2991/978-94-6239-145-1_66(701-708)Online publication date: 13-Oct-2015
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    cover image ACM Conferences
    DAC '12: Proceedings of the 49th Annual Design Automation Conference
    June 2012
    1357 pages
    ISBN:9781450311991
    DOI:10.1145/2228360
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 03 June 2012

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    Author Tags

    1. function pointer
    2. high-level synthesis
    3. recursion
    4. stream processing
    5. term rewriting

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    June 3 - 7, 2012
    California, San Francisco

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    Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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    View all
    • (2016)Supporting Static Binding in Stream Rewriting for Heterogeneous Many-Core Architectures2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)10.1109/MCSoC.2016.26(273-280)Online publication date: Sep-2016
    • (2015)Hardware synthesis from a recursive functional languageProceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis10.5555/2830840.2830850(83-93)Online publication date: 4-Oct-2015
    • (2015)New Design of the Combined Balance Control SystemProceedings of the 6th International Asia Conference on Industrial Engineering and Management Innovation10.2991/978-94-6239-145-1_66(701-708)Online publication date: 13-Oct-2015
    • (2015)Inter-procedural resource sharing in High Level Synthesis through function proxies2015 25th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2015.7293958(1-8)Online publication date: Sep-2015
    • (2015)Dynamic task mapping of graphics processing applications on many-core architectures through stream rewriting2015 13th IEEE Symposium on Embedded Systems For Real-time Multimedia (ESTIMedia)10.1109/ESTIMedia.2015.7351763(1-2)Online publication date: Oct-2015
    • (2015)Hardware synthesis from a recursive functional language2015 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)10.1109/CODESISSS.2015.7331371(83-93)Online publication date: Oct-2015
    • (2014)Scheduling of Recursive and Dynamic Data-Flow Graphs Using Stream RewritingProceedings of the 2014 International Symposium on Computer Architecture and High Performance Computing Workshop10.1109/SBAC-PADW.2014.7(102-107)Online publication date: 22-Oct-2014
    • (2014)System level synthesis of many-core architectures using parallel stream rewritingProceedings of the 2014 Electronic System Level Synthesis Conference (ESLsyn)10.1109/ESLsyn.2014.6850388(1-6)Online publication date: May-2014
    • (2013)A Programmable Graphics Processor based on Partial Stream RewritingComputer Graphics Forum10.1111/cgf.1224032:7(325-334)Online publication date: 25-Nov-2013
    • (2013)Dynamic task mapping onto multi-core architectures through stream rewriting2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)10.1109/SAMOS.2013.6621123(196-204)Online publication date: Jul-2013
    • Show More Cited By

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