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Optimizing MapReduce for GPUs with effective shared memory usage

Published: 18 June 2012 Publication History

Abstract

Accelerators and heterogeneous architectures in general, and GPUs in particular, have recently emerged as major players in high performance computing. For many classes of applications, MapReduce has emerged as the framework for easing parallel programming and improving programmer productivity. There have already been several efforts on implementing MapReduce on GPUs.
In this paper, we propose a new implementation of MapReduce for GPUs, which is very effective in utilizing shared memory, a small programmable cache on modern GPUs. The main idea is to use a reduction-based method to execute a MapReduce application. The reduction-based method allows us to carry out reductions in shared memory. To support a general and efficient implementation, we support the following features: a memory hierarchy for maintaining the reduction object, a multi-group scheme in shared memory to trade-off space requirements and locking overheads, a general and efficient data structure for the reduction object, and an efficient swapping mechanism.
We have evaluated our framework with seven commonly used MapReduce applications and compared it with the sequential implementations, MapCG, a recent MapReduce implementation on GPUs, and Ji et al.'s work, a recent MapReduce implementation that utilizes shared memory in a different way. The main observations from our experimental results are as follows. For four of the seven applications that can be considered as reduction-intensive applications, our framework has a speedup of between 5 and 200 over MapCG (for large datasets). Similarly, we achieved a speedup of between 2 and 60 over Ji et al.'s work.

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cover image ACM Conferences
HPDC '12: Proceedings of the 21st international symposium on High-Performance Parallel and Distributed Computing
June 2012
308 pages
ISBN:9781450308052
DOI:10.1145/2287076
  • General Chair:
  • Dick Epema,
  • Program Chairs:
  • Thilo Kielmann,
  • Matei Ripeanu
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Publication History

Published: 18 June 2012

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Author Tags

  1. gpu
  2. mapreduce
  3. shared memory

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HPDC '12 Paper Acceptance Rate 23 of 143 submissions, 16%;
Overall Acceptance Rate 166 of 966 submissions, 17%

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  • (2024)An enhanced polar-based GPGPU-parallelized contact detection algorithm for 3D FDEM and its application to cracking analysis of shield tunnel segmental liningsTunnelling and Underground Space Technology10.1016/j.tust.2024.105782148(105782)Online publication date: Jun-2024
  • (2023)Distributed Shared MemoryDistributed Systems10.1002/9781119825968.ch13(337-369)Online publication date: 10-Feb-2023
  • (2021)Automatically exploiting the memory hierarchy of GPUs through just-in-time compilationProceedings of the 17th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments10.1145/3453933.3454014(57-70)Online publication date: 7-Apr-2021
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