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Testbenches for advanced TLM verification

Published:07 October 2012Publication History

ABSTRACT

As verification activities dominate the systems development process efficient testbenches at an adequate level of abstraction are crucial factors to shorten time-to-market. We give an overview of the current state of ESL testbenches and the corresponding articles of the special session show advances and future directions of IEEE-1600-2011 SystemC in the context of testbenches for Transaction Level Modeling (TLM)[5][6][12][15][16].

References

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      • Published in

        cover image ACM Conferences
        CODES+ISSS '12: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
        October 2012
        596 pages
        ISBN:9781450314268
        DOI:10.1145/2380445

        Copyright © 2012 Copyright is held by the owner/author(s)

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        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 7 October 2012

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