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Faithful single-precision floating-point tangent for FPGAs

Published: 11 February 2013 Publication History

Abstract

This paper presents an FPGA-specific implementation of the floating-point tangent function. The implementation inputs values in the interval [-π/2,π/2], targets the IEEE-754 single-precision format and has an accuracy of 1 ulp. The proposed work is based on a combination of mathematical identities and properties of the tangent function in floating point. The architecture was designed having the {Stratix-IV} DSP and memory blocks in mind but should map well on any contemporary FPGA featuring embedded multiplier and memory blocks. It outperforms generic polynomial approximation targeting the same resource spectrum and provides better resources trade-offs than classical CORDIC-based implementations.The presented work is widely available as being part of the Altera DSP Builder Advanced Blockset.

References

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DSP Builder Advanced Blockset. http://www.altera.com/technology/dsp/advanced-blockset/dsp-advanced-blockset.html.
[2]
IEEE Standard for Floating-Point Arithmetic. IEEE Std 754-2008, pages 1--58, 29 2008.
[3]
StratixIII Device Handbook, 2010. http://www.altera.com/literature/hb/stx3/stratix3_handbook.pdf.
[4]
StratixIV Device Handbook, 2011. http://www.altera.com/literature/hb/stratix-iv/stx4_5v1.pdf.
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S. Banescu, F. de Dinechin, B. Pasca, and R. Tudoran. Multipliers for floating-point double precision and beyond on FPGAs. In International Workshop on Higly-Efficient Accelerators and Reconfigurable Technologies (HEART). ACM, jun 2010.
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I. Berkeley Design Technology. An Independent Analysis of Altera's FPGA Floating-point DSP Design Flow. 2011.
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F. de Dinechin and B. Pasca. Designing custom arithmetic data paths with FloPoCo. IEEE Design and Test, 2011.
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J. Detrey and F. de Dinechin. Table-based polynomials for fast hardware function evaluation. In S. Vassiliadis, N. Dimopoulos, and S. Rajopadhye, editors, 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP'05), pages 328--333, Samos, Greece, July 2005. IEEE Computer Society.
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J. Detrey and F. de Dinechin. Floating-point trigonometric functions for FPGAs. In International Conference on Field Programmable Logic and Applications, pages 29--34, Amsterdam, Netherlands, aug 2007. IEEE.
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J. Detrey and F. de Dinechin. Floating-point trigonometric functions for FPGAs. In K. Bertels, W. Najjar, A. van Genderen, and S. Vassiliadis, editors, 17th International Conference on Field Programmable Logic and Applications (FPL'07), pages 29--34, Amsterdam, Netherlands, Aug. 2007. IEEE.
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E. Garcia, R. Cumplido, and M. Arias. Pipelined cordic design on fpga for a digital sine and cosine waves generator. In Electrical and Electronics Engineering, 2006 3rd International Conference on, pages 1--4, sept. 2006.
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M. Langhammer and T. VanCourt. FPGA floating point datapath compiler. Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, 17:259--262, 2009.
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J.-M. Muller, N. Brisebarre, F. de Dinechin, C.-P. Jeannerod, V. Lefèvre, G. Melquiond, N. Revol, D. Stehlé, and S. Torres. Handbook of Floating-Point Arithmetic. Birkhauser Boston, 2010.
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B. Pasca. Correctly rounded floating-point division for DSP-enabled FPGAs. In 22th International Conference on Field Programmable Logic and Applications (FPL'12), Oslo, Norway, Aug. 2012. IEEE.
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M. H. Payne and R. N. Hanek. Radian reduction for trigonometric functions. ACM SIGNUM Newsletter, 18(1):19--24, Jan. 1983.
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Y. Shang. Implementation of ip core of fast sine and cosine operation through FPGA. Energy Procedia, 16, Part B(0):1253--1258, 2012. 2012 ICFEEM.

Cited By

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  • (2018)Activation Function Architectures for FPGAs2018 28th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2018.00015(43-437)Online publication date: Aug-2018
  • (2018)Hardware Implementation of Floating-Point ArithmeticHandbook of Floating-Point Arithmetic10.1007/978-3-319-76526-6_8(267-320)Online publication date: 3-May-2018
  • (2017)Floating Point Tangent Implementation for FPGAs2017 IEEE 24th Symposium on Computer Arithmetic (ARITH)10.1109/ARITH.2017.25(64-65)Online publication date: Jul-2017

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cover image ACM Conferences
FPGA '13: Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
February 2013
294 pages
ISBN:9781450318877
DOI:10.1145/2435264
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 11 February 2013

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Author Tags

  1. floating-point
  2. fpga
  3. single-precision
  4. tangent

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Cited By

View all
  • (2018)Activation Function Architectures for FPGAs2018 28th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2018.00015(43-437)Online publication date: Aug-2018
  • (2018)Hardware Implementation of Floating-Point ArithmeticHandbook of Floating-Point Arithmetic10.1007/978-3-319-76526-6_8(267-320)Online publication date: 3-May-2018
  • (2017)Floating Point Tangent Implementation for FPGAs2017 IEEE 24th Symposium on Computer Arithmetic (ARITH)10.1109/ARITH.2017.25(64-65)Online publication date: Jul-2017

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