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GROK-LAB: generating real on-chip knowledge for intra-cluster delays using timing extraction

Published: 11 February 2013 Publication History

Abstract

Timing Extraction identifies the delay of fine-grained components within an FPGA. From these computed delays, the delay of any path can be calculated. Moreover, a comparison of the fine-grained delays allows a detailed understanding of the amount and type of process variation that exists in the FPGA. To obtain these delays, Timing Extraction measures, using only resources already available in the FPGA, the delay of a small subset of the total paths in the FPGA. We apply Timing Extraction to the Logic Array Block (LAB) on an Altera Cyclone III FPGA to obtain a view of the delay down to near individual LUT granularity, characterizing components with delays on the order of a few hundred picoseconds with a resolution of ±3.2 ps. This information reveals that the 65 nm process used has, on average, random variation of Ã/¼ = 4.0% with components having an average maximum spread of 83 ps. Timing extraction also shows that as VDD decreases from 1.2 V to 0.9 V in a Cyclone IV 60 nm FPGA, paths slow down and variation increases from Ã/¼ = 4.3% to Ã/¼ = 5.8%, a clear indication that lowering VDD magnifies the impact of random variation.

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Cited By

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  • (2024)Ph.D. Project: ManAge: A Tool for Timing Characterization of FPGAs2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)10.1109/FCCM60383.2024.00054(239-240)Online publication date: 5-May-2024
  • (2020)Optimizing FPGA Logic Circuitry for Variable Voltage SuppliesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2019.296250128:4(890-903)Online publication date: Apr-2020
  • (2018)Automatic Application-Specific Calibration to Enable Dynamic Voltage Scaling in FPGAsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.280122237:12(3095-3108)Online publication date: Dec-2018
  • Show More Cited By

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          cover image ACM Conferences
          FPGA '13: Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
          February 2013
          294 pages
          ISBN:9781450318877
          DOI:10.1145/2435264
          Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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          Published: 11 February 2013

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          1. component-specific mapping
          2. in-system measurement
          3. variation characterization
          4. variation measurment

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          View all
          • (2024)Ph.D. Project: ManAge: A Tool for Timing Characterization of FPGAs2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)10.1109/FCCM60383.2024.00054(239-240)Online publication date: 5-May-2024
          • (2020)Optimizing FPGA Logic Circuitry for Variable Voltage SuppliesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2019.296250128:4(890-903)Online publication date: Apr-2020
          • (2018)Automatic Application-Specific Calibration to Enable Dynamic Voltage Scaling in FPGAsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.280122237:12(3095-3108)Online publication date: Dec-2018
          • (2016)Measure twice and cut once: Robust dynamic voltage scaling for FPGAs2016 26th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2016.7577342(1-11)Online publication date: Aug-2016
          • (2015)Imprecise Datapath DesignACM Transactions on Reconfigurable Technology and Systems10.1145/26295278:2(1-23)Online publication date: 17-Mar-2015
          • (2014)GROK-LABACM Transactions on Reconfigurable Technology and Systems10.1145/25978897:4(1-23)Online publication date: 29-Dec-2014
          • (2014)High-precision self-characterization for the LUT burn-in information leakage threat2014 24th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2014.6927475(1-6)Online publication date: Sep-2014
          • (2013)Exploiting stochastic delay variability on FPGAs with adaptive partial rerouting2013 International Conference on Field-Programmable Technology (FPT)10.1109/FPT.2013.6718362(254-261)Online publication date: Dec-2013
          • (2013)Exploiting Input Parameter Uncertainty for Reducing Datapath Precision of SPICE Device ModelsProceedings of the 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines10.1109/FCCM.2013.28(189-197)Online publication date: 28-Apr-2013
          • (2013)Accuracy-Performance Tradeoffs on an FPGA through OverclockingProceedings of the 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines10.1109/FCCM.2013.10(29-36)Online publication date: 28-Apr-2013

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