skip to main content
10.1145/2435264.2435328acmconferencesArticle/Chapter ViewAbstractPublication PagesfpgaConference Proceedingsconference-collections
poster

An FPGA-based transient error simulator for evaluating resilient system designs (abstract only)

Published: 11 February 2013 Publication History

Abstract

Error-resilient designs have become more important with the continued device scaling. One critical challenge of designing error-resilient systems is the lack of tools to quickly and accurately evaluate the effectiveness and performance of such systems. We propose an FPGA-based transient error simulator to accelerate transient error simulations incorporating accurate datapath delay models and realistic error models. Compared to conventional digital error simulators, the FPGA-based transient error simulator operates at a finer time step and captures intricate interactions between errors and datapath under different circuit-level error detection and correction techniques. The error simulator is constructed using configurable datapath delay model and error model, making it general-purpose and widely applicable. We demonstrate the capability of this simulator in the evaluation of two popular error-resilient design techniques, pre-edge and post-edge detection and correction, using a synthesized CORDIC processor and an Alpha processor that operate under soft error, coupling noise and voltage droop models. The proposed error simulator uncovers insights to guide practical designs, including the choice of checking window in pre-edge designs and the optimal operating frequency in post-edge designs. The FPGA-based transient simulation will complement circuit simulation and system emulation for resilient system designs.

Index Terms

  1. An FPGA-based transient error simulator for evaluating resilient system designs (abstract only)

        Recommendations

        Comments

        Information & Contributors

        Information

        Published In

        cover image ACM Conferences
        FPGA '13: Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
        February 2013
        294 pages
        ISBN:9781450318877
        DOI:10.1145/2435264

        Sponsors

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        Published: 11 February 2013

        Permissions

        Request permissions for this article.

        Check for updates

        Author Tags

        1. FPGA-based simulation
        2. error detection and correction
        3. error-resilient design
        4. reliability
        5. transient simulation

        Qualifiers

        • Poster

        Conference

        FPGA '13
        Sponsor:

        Acceptance Rates

        Overall Acceptance Rate 125 of 627 submissions, 20%

        Upcoming Conference

        FPGA '25

        Contributors

        Other Metrics

        Bibliometrics & Citations

        Bibliometrics

        Article Metrics

        • 0
          Total Citations
        • 0
          Total Downloads
        • Downloads (Last 12 months)0
        • Downloads (Last 6 weeks)0
        Reflects downloads up to 18 Feb 2025

        Other Metrics

        Citations

        View Options

        View options

        Figures

        Tables

        Media

        Share

        Share

        Share this Publication link

        Share on social media