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Profiling and online system-level performance and power estimation for dynamically adaptable embedded systems

Published: 08 April 2013 Publication History

Abstract

Significant research has demonstrated the performance and power benefits of runtime dynamic reconfiguration of FPGAs and microprocessor/FPGA devices. For dynamically reconfigurable systems, in which the selection of hardware coprocessors to implement within the FPGA is determined at runtime, online estimation methods are needed to evaluate the performance and power consumption impact of the hardware coprocessor selection. In this paper, we present a profile assisted online system-level performance and power estimation framework for estimating the speedup and power consumption of dynamically reconfigurable embedded systems. We evaluate the accuracy and fidelity of our online estimation framework for dynamic hardware kernel selection to maximize performance or minimize the system power consumption.

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  • (2021)Overview of existing solutions for the organization of reconfigurable computing systemsContemporary information technologies10.46548/CIT-2021-0034-0001Online publication date: 20-Dec-2021
  • (2020)DynRP- Non-Intrusive Profiler for Dynamic Reconfigurability2020 24th International Symposium on VLSI Design and Test (VDAT)10.1109/VDAT50263.2020.9190415(1-6)Online publication date: Jul-2020
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  1. Profiling and online system-level performance and power estimation for dynamically adaptable embedded systems

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      cover image ACM Transactions on Embedded Computing Systems
      ACM Transactions on Embedded Computing Systems  Volume 12, Issue 3
      March 2013
      463 pages
      ISSN:1539-9087
      EISSN:1558-3465
      DOI:10.1145/2442116
      Issue’s Table of Contents
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 08 April 2013
      Accepted: 01 April 2011
      Revised: 01 March 2011
      Received: 01 June 2010
      Published in TECS Volume 12, Issue 3

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      Author Tags

      1. Performance and power estimation
      2. dynamic hardware/software partitioning
      3. dynamically adaptable systems
      4. embedded systems
      5. non-intrusive profiling
      6. online estimation

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      View all
      • (2021)Overview of existing solutions for the organization of reconfigurable computing systemsContemporary information technologies10.46548/CIT-2021-0034-0001Online publication date: 20-Dec-2021
      • (2020)DynRP- Non-Intrusive Profiler for Dynamic Reconfigurability2020 24th International Symposium on VLSI Design and Test (VDAT)10.1109/VDAT50263.2020.9190415(1-6)Online publication date: Jul-2020
      • (2019)Data-driven Anomaly Detection with Timing Features for Embedded SystemsACM Transactions on Design Automation of Electronic Systems10.1145/327994924:3(1-27)Online publication date: 2-Apr-2019
      • (2019)Adaptive Energy Management for Dynamically Reconfigurable ProcessorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2013.228226533:1(50-63)Online publication date: 4-Jan-2019
      • (2017)Time and Sequence Integrated Runtime Anomaly Detection for Embedded SystemsACM Transactions on Embedded Computing Systems10.1145/312278517:2(1-27)Online publication date: 7-Dec-2017
      • (2017)Subcomponent Timing-Based Detection of Malware in Embedded Systems2017 IEEE International Conference on Computer Design (ICCD)10.1109/ICCD.2017.12(17-24)Online publication date: Nov-2017

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