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DeAliaser: alias speculation using atomic region support

Published: 16 March 2013 Publication History

Abstract

Alias analysis is a critical component in many compiler optimizations. A promising approach to reduce the complexity of alias analysis is to use speculation. The approach consists of performing optimizations assuming the alias relationships that are true most of the time, and repairing the code when such relationships are found not to hold through runtime checks.
This paper proposes a general alias speculation scheme that leverages upcoming hardware support for transactions with the help of some ISA extensions. The ability of transactions to checkpoint and roll back frees the compiler to pursue aggressive optimizations without having to worry about recovery code. Also, exposing the memory conflict detection hardware in transactions to software allows runtime checking of aliases with little or no overhead. We test the potential of the novel alias speculation approach with Loop Invariant Code Motion (LICM), Global Value Numbering (GVN), and Partial Redundancy Elimination (PRE) optimization passes. On average, they are shown to reduce program execution time by 9% in SPEC FP2006 applications and 3% in SPEC INT2006 applications over the alias analysis of a state-of-the-art compiler.

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  • (2015)Enabling Efficient Alias SpeculationACM SIGPLAN Notices10.1145/2808704.275496450:5(1-10)Online publication date: 4-Jun-2015
  • (2015)Enabling Efficient Alias SpeculationProceedings of the 16th ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems 2015 CD-ROM10.1145/2670529.2754964(1-10)Online publication date: 4-Jun-2015
  • (2014)Exploitation of GPUs for the Parallelisation of Probably Parallel Legacy CodeCompiler Construction10.1007/978-3-642-54807-9_9(154-173)Online publication date: 2014
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Published In

cover image ACM Conferences
ASPLOS '13: Proceedings of the eighteenth international conference on Architectural support for programming languages and operating systems
March 2013
574 pages
ISBN:9781450318709
DOI:10.1145/2451116
  • cover image ACM SIGARCH Computer Architecture News
    ACM SIGARCH Computer Architecture News  Volume 41, Issue 1
    ASPLOS '13
    March 2013
    540 pages
    ISSN:0163-5964
    DOI:10.1145/2490301
    Issue’s Table of Contents
  • cover image ACM SIGPLAN Notices
    ACM SIGPLAN Notices  Volume 48, Issue 4
    ASPLOS '13
    April 2013
    540 pages
    ISSN:0362-1340
    EISSN:1558-1160
    DOI:10.1145/2499368
    Issue’s Table of Contents
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Published: 16 March 2013

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Author Tags

  1. alias analysis
  2. atomic region
  3. compiler optimization
  4. transactional memory

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Cited By

View all
  • (2015)Enabling Efficient Alias SpeculationACM SIGPLAN Notices10.1145/2808704.275496450:5(1-10)Online publication date: 4-Jun-2015
  • (2015)Enabling Efficient Alias SpeculationProceedings of the 16th ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems 2015 CD-ROM10.1145/2670529.2754964(1-10)Online publication date: 4-Jun-2015
  • (2014)Exploitation of GPUs for the Parallelisation of Probably Parallel Legacy CodeCompiler Construction10.1007/978-3-642-54807-9_9(154-173)Online publication date: 2014
  • (2013)Allocating rotating registers by schedulingProceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/2540708.2540738(346-358)Online publication date: 7-Dec-2013
  • (2023)ORAQL — Optimistic Responses to Alias Queries in LLVMProceedings of the 52nd International Conference on Parallel Processing10.1145/3605573.3605644(655-664)Online publication date: 7-Aug-2023

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