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Superblock compilation and other optimization techniques for a Java-based DBT machine emulator

Published: 16 March 2013 Publication History

Abstract

Superblock compilation techniques such as control flow graph (CFG) or trace compilation have become a widely adopted approach to increase the performance of dynamically compiling virtual machines even further. While this was shown to be successful for many conventional virtual machines, it did not result in a higher performance for Java-based DBT machine emulators so far. These emulators dynamically translate application binaries of a target machine into Java bytecode, which is then eventually compiled into the native code of the emulating host by the Java Virtual Machine (JVM). Successful superblock compilation techniques for this class of emulators must consider the special requirements that result from the two-stage translation as well as the characteristics of the JVM, such as the inability of most Java JIT compilers to handle large bytecode methods efficiently.
In this paper, we present a superblock compilation approach for a Java-based DBT machine emulator that generates a performance increase of up to 90 percent and of 32 percent on average. The key idea of our design is to provide a large scope over the control flow of target applications across basic block boundaries for the JVM, while still keeping small bytecode methods for the execution units.
In addition, we also present two further optimizations -- interpreter context elimination and program counter elimination -- which increase the emulation performance by 16 percent again. In total, the optimization techniques discussed in this paper provide an average performance gain of 48 percent for the surveyed emulator.

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Cited By

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  • (2014)Efficient code generation in a region-based dynamic binary translatorACM SIGPLAN Notices10.1145/2666357.259781049:5(3-12)Online publication date: 12-Jun-2014
  • (2014)SPTUProceedings of International Conference on Systems and Storage10.1145/2611354.2611368(1-12)Online publication date: 30-Jun-2014
  • (2014)Efficient code generation in a region-based dynamic binary translatorProceedings of the 2014 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems10.1145/2597809.2597810(3-12)Online publication date: 12-Jun-2014

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  1. Superblock compilation and other optimization techniques for a Java-based DBT machine emulator

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      cover image ACM Conferences
      VEE '13: Proceedings of the 9th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments
      March 2013
      210 pages
      ISBN:9781450312660
      DOI:10.1145/2451512
      • cover image ACM SIGPLAN Notices
        ACM SIGPLAN Notices  Volume 48, Issue 7
        VEE '13
        July 2013
        194 pages
        ISSN:0362-1340
        EISSN:1558-1160
        DOI:10.1145/2517326
        Issue’s Table of Contents
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      Published: 16 March 2013

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      Author Tags

      1. emulation
      2. java
      3. optimization
      4. superblock
      5. virtualization

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      View all
      • (2014)Efficient code generation in a region-based dynamic binary translatorACM SIGPLAN Notices10.1145/2666357.259781049:5(3-12)Online publication date: 12-Jun-2014
      • (2014)SPTUProceedings of International Conference on Systems and Storage10.1145/2611354.2611368(1-12)Online publication date: 30-Jun-2014
      • (2014)Efficient code generation in a region-based dynamic binary translatorProceedings of the 2014 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems10.1145/2597809.2597810(3-12)Online publication date: 12-Jun-2014

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