research-article

Aging-aware compiler-directed VLIW assignment for GPGPU architectures

Authors:

Rajesh K. GuptaAuthors Info & Claims

DAC '13: Proceedings of the 50th Annual Design Automation Conference

Article No.: 16, Pages 1 - 6

https://doi.org/10.1145/2463209.2488754

Published: 29 May 2013 Publication History

Abstract

Negative bias temperature instability (NBTI) adversely affects the reliability of a processor by introducing new delay-induced faults. However, the effect of these delay variations is not uniformly spread across functional units and instructions: some are affected more (hence less reliable) than others. This paper proposes a NBTI-aware compiler-directed very long instruction word (VLIW) assignment scheme that uniformly distributes the stress of instructions with the aim of minimizing aging of GPGPU architecture without any performance penalty. The proposed solution is an entirely software technique based on static workload characterization and online execution with NBTI monitoring that equalizes the expected lifetime of each processing element by regenerating aging-aware healthy kernels that respond to the specific health state of GPGPU. We demonstrate our approach on AMD Evergreen architecture where iso-throughput executions of the healthy kernels reduce NBTI-induced voltage threshold shift up to 49% (11%) compared to naïve kernel executions, with (without) architectural support for power-gating. The kernel adaption flow takes average of 13 millisecond on a typical host machine thus making it suitable for practical implementation.

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Cited By

Medeiros TBerned GNavarro ARossi FLuizelli MBrandalero MHubner MBeck ALorenzon A(2021)Aging-Aware Parallel ExecutionIEEE Embedded Systems Letters10.1109/LES.2020.302185413:3(122-125)Online publication date: Sep-2021
https://doi.org/10.1109/LES.2020.3021854
Medeiros TPereira LRossi FLuizelli MBeck ALorenzon A(2021)Mitigating the processor aging through dynamic concurrency throttlingJournal of Parallel and Distributed Computing10.1016/j.jpdc.2021.05.006156(86-100)Online publication date: Oct-2021
https://doi.org/10.1016/j.jpdc.2021.05.006
Ma YZhou JChantem TDick RWang SHu X(2020)Improving Reliability of Soft Real-Time Embedded Systems on Integrated CPU and GPU PlatformsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.294068139:10(2218-2229)Online publication date: Oct-2020
https://doi.org/10.1109/TCAD.2019.2940681
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Aging-aware compiler-directed VLIW assignment for GPGPU architectures

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cover image ACM Conferences

DAC '13: Proceedings of the 50th Annual Design Automation Conference

May 2013

1285 pages

ISBN:9781450320719

DOI:10.1145/2463209

Copyright © 2013 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAC: Electronic Design Automation Consortium
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SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

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Published: 29 May 2013

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DAC '13: The 50th Annual Design Automation Conference 2013

May 29 - June 7, 2013

Texas, Austin

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Medeiros TBerned GNavarro ARossi FLuizelli MBrandalero MHubner MBeck ALorenzon A(2021)Aging-Aware Parallel ExecutionIEEE Embedded Systems Letters10.1109/LES.2020.302185413:3(122-125)Online publication date: Sep-2021
https://doi.org/10.1109/LES.2020.3021854
Medeiros TPereira LRossi FLuizelli MBeck ALorenzon A(2021)Mitigating the processor aging through dynamic concurrency throttlingJournal of Parallel and Distributed Computing10.1016/j.jpdc.2021.05.006156(86-100)Online publication date: Oct-2021
https://doi.org/10.1016/j.jpdc.2021.05.006
Ma YZhou JChantem TDick RWang SHu X(2020)Improving Reliability of Soft Real-Time Embedded Systems on Integrated CPU and GPU PlatformsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.294068139:10(2218-2229)Online publication date: Oct-2020
https://doi.org/10.1109/TCAD.2019.2940681
Rahimi AGupta R(2020)Hardware/Software Codesign for Energy Efficiency and Robustness: From Error-Tolerant Computing to Approximate ComputingDependable Embedded Systems10.1007/978-3-030-52017-5_22(527-543)Online publication date: 10-Dec-2020
https://doi.org/10.1007/978-3-030-52017-5_22
Medeiros TPereira LRossi FLuizelli MBeck ALorenzon A(2019)Transparent Aging-Aware Thread Throttling2019 31st International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)10.1109/SBAC-PAD.2019.00014(1-8)Online publication date: Oct-2019
https://doi.org/10.1109/SBAC-PAD.2019.00014
Lee HShafique MAl Faruque M(2018)Aging-Aware Workload Management on Embedded GPU Under Process VariationIEEE Transactions on Computers10.1109/TC.2018.278990467:7(920-933)Online publication date: 1-Jul-2018
https://dl.acm.org/doi/10.1109/TC.2018.2789904
Lee HShafique MAl Faruque M(2017)Low-overhead Aging-aware Resource Management on Embedded GPUsProceedings of the 54th Annual Design Automation Conference 201710.1145/3061639.3062277(1-6)Online publication date: 18-Jun-2017
https://dl.acm.org/doi/10.1145/3061639.3062277
Sengupta DMishra VSapatnekar S(2016)Invited - Optimizing device reliability effects at the intersection of physics, circuits, and architectureProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2905016(1-6)Online publication date: 5-Jun-2016
https://dl.acm.org/doi/10.1145/2897937.2905016
Wang XZhang DSu DWinemberg LTehranipoor M(2016)A Novel Peak Power Supply Noise Measurement and Adaptation System for Integrated CircuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2015.249200024:5(1715-1727)Online publication date: May-2016
https://doi.org/10.1109/TVLSI.2015.2492000
Rahimi ABenini LGupta R(2016)Variability Mitigation in Nanometer CMOS Integrated Systems: A Survey of Techniques From Circuits to SoftwareProceedings of the IEEE10.1109/JPROC.2016.2518864104:7(1410-1448)Online publication date: Jul-2016
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