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Improving energy gains of inexact DSP hardware through reciprocative error compensation

Published: 29 May 2013 Publication History

Abstract

We present a zero hardware-overhead design approach called reciprocative error compensation (REC) that significantly enhances the energy-accuracy trade-off gains in inexact signal processing datapaths by using a two-pronged approach: (a) deliberately redesigning the basic arithmetic blocks to effectively compensate for each other's (expected) error through inexact logic minimization, and (b) "reshaping" the response waveforms of the systems being designed to further reduce any residual error. We apply REC to several DSP primitives such as the FFT and FIR filter blocks, and show that this approach delivers 2-3 orders of magnitude lower (expected) error and more than an order of magnitude lesser Signal-to-Noise Ratio (SNR) loss (in dB) over the previously proposed inexact design techniques, while yielding similar energy gains. Post-layout comparisons in the 65nm process technology show that our REC approach achieves upto 73% energy savings (with corresponding delay and area savings of upto 16% and 62% respectively) when compared to an existing exact DSP implementation while trading a relatively small loss in SNR of less than 1.5 dB.

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          cover image ACM Conferences
          DAC '13: Proceedings of the 50th Annual Design Automation Conference
          May 2013
          1285 pages
          ISBN:9781450320719
          DOI:10.1145/2463209
          Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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          Published: 29 May 2013

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          • (2024)High-Speed and Low-Power Recursive Rounding Based Approximate Multipliers for Error-Resilience ApplicationsWireless Personal Communications10.1007/s11277-024-11283-0136:2(773-791)Online publication date: 25-Jun-2024
          • (2023)A Survey on Approximate Multiplier Designs for Energy Efficiency: From Algorithms to CircuitsACM Transactions on Design Automation of Electronic Systems10.1145/361029129:1(1-37)Online publication date: 24-Jul-2023
          • (2022)Low power multiplier based long short-term memory hardware architecture for smart grid energy managementInternational Journal of System Assurance Engineering and Management10.1007/s13198-022-01662-w13:5(2531-2539)Online publication date: 15-Apr-2022
          • (2021)Error-Efficient Approximate Multiplier Design using Rounding Based Approach for Image Smoothing ApplicationJournal of Electronic Testing10.1007/s10836-021-05971-zOnline publication date: 10-Nov-2021
          • (2017)qLUTACM Transactions on Embedded Computing Systems10.1145/312653116:5s(1-23)Online publication date: 27-Sep-2017
          • (2017)Approximate compressed sensing for hardware-efficient image compression2017 30th IEEE International System-on-Chip Conference (SOCC)10.1109/SOCC.2017.8226074(340-345)Online publication date: Sep-2017
          • (2015)Opportunities for energy efficient computingProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition10.5555/2755753.2755927(764-769)Online publication date: 9-Mar-2015
          • (2015)Perceptually guided inexact DSP design for power, area efficient hearing aid2015 IEEE Biomedical Circuits and Systems Conference (BioCAS)10.1109/BioCAS.2015.7348319(1-4)Online publication date: Oct-2015
          • (2014)Highly energy-efficient and quality-tunable inexact FFT acceleratorsProceedings of the IEEE 2014 Custom Integrated Circuits Conference10.1109/CICC.2014.6946047(1-4)Online publication date: Sep-2014

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