research-article

On learning-based methods for design-space exploration with high-level synthesis

Authors:

Luca P. CarloniAuthors Info & Claims

DAC '13: Proceedings of the 50th Annual Design Automation Conference

Article No.: 50, Pages 1 - 7

https://doi.org/10.1145/2463209.2488795

Published: 29 May 2013 Publication History

Abstract

This paper makes several contributions to address the challenge of supervising HLS tools for design space exploration (DSE). We present a study on the application of learning-based methods for the DSE problem, and propose a learning model for HLS that is superior to the best models described in the literature. In order to speedup the convergence of the DSE process, we leverage transductive experimental design, a technique that we introduce for the first time to the CAD community. Finally, we consider a practical variant of the DSE problem, and present a solution based on randomized selection with strong theory guarantee.

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Cited By

Pouget SPouchet LCong J(2025)Automatic Hardware Pragma Insertion in High-Level Synthesis: A Non-Linear Programming ApproachACM Transactions on Design Automation of Electronic Systems10.1145/371184730:2(1-44)Online publication date: 7-Feb-2025
https://dl.acm.org/doi/10.1145/3711847
Wang ZChen LWang JBai YLi XLi XYuan MHao JZhang YWu FSalakhutdinov RKolter ZHeller KWeller AOliver NScarlett JBerkenkamp F(2024)A circuit domain generalization framework for efficient logic synthesis in chip designProceedings of the 41st International Conference on Machine Learning10.5555/3692070.3694123(50163-50207)Online publication date: 21-Jul-2024
https://dl.acm.org/doi/10.5555/3692070.3694123
Cheng SJin PGuo QDu ZZhang RHu XZhao YHao YGuan XHan HZhao ZLiu XZhang XChu YMao WChen TChen YLarson K(2024)Automated CPU design by learning from input-output examplesProceedings of the Thirty-Third International Joint Conference on Artificial Intelligence10.24963/ijcai.2024/425(3843-3853)Online publication date: 3-Aug-2024
https://dl.acm.org/doi/10.24963/ijcai.2024/425
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Index Terms

On learning-based methods for design-space exploration with high-level synthesis
1. Hardware
  1. Integrated circuits
    1. Logic circuits

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cover image ACM Conferences

DAC '13: Proceedings of the 50th Annual Design Automation Conference

May 2013

1285 pages

ISBN:9781450320719

DOI:10.1145/2463209

Copyright © 2013 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

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Association for Computing Machinery

New York, NY, United States

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Published: 29 May 2013

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DAC '13: The 50th Annual Design Automation Conference 2013

May 29 - June 7, 2013

Texas, Austin

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Pouget SPouchet LCong J(2025)Automatic Hardware Pragma Insertion in High-Level Synthesis: A Non-Linear Programming ApproachACM Transactions on Design Automation of Electronic Systems10.1145/371184730:2(1-44)Online publication date: 7-Feb-2025
https://dl.acm.org/doi/10.1145/3711847
Wang ZChen LWang JBai YLi XLi XYuan MHao JZhang YWu FSalakhutdinov RKolter ZHeller KWeller AOliver NScarlett JBerkenkamp F(2024)A circuit domain generalization framework for efficient logic synthesis in chip designProceedings of the 41st International Conference on Machine Learning10.5555/3692070.3694123(50163-50207)Online publication date: 21-Jul-2024
https://dl.acm.org/doi/10.5555/3692070.3694123
Cheng SJin PGuo QDu ZZhang RHu XZhao YHao YGuan XHan HZhao ZLiu XZhang XChu YMao WChen TChen YLarson K(2024)Automated CPU design by learning from input-output examplesProceedings of the Thirty-Third International Joint Conference on Artificial Intelligence10.24963/ijcai.2024/425(3843-3853)Online publication date: 3-Aug-2024
https://dl.acm.org/doi/10.24963/ijcai.2024/425
Liu TWang QLiu LWang FYoung E(2024)On Advanced Methodologies for Microarchitecture Design Space ExplorationProceedings of the Great Lakes Symposium on VLSI 202410.1145/3649476.3658764(376-382)Online publication date: 12-Jun-2024
https://dl.acm.org/doi/10.1145/3649476.3658764
Cheng JCoward SChelini LBarbalho RDrane TTsafrir DMusuvathi MGupta RAbu-Ghazaleh N(2024)SEER: Super-Optimization Explorer for High-Level Synthesis using E-graph RewritingProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 210.1145/3620665.3640392(1029-1044)Online publication date: 27-Apr-2024
https://dl.acm.org/doi/10.1145/3620665.3640392
Parchamdar BCarrion Schaefer B(2024)Investigating the Effect of Hyper-Parameter Settings on Simulated Annealing-Based High-Level Synthesis Design Space Exploration2024 IEEE 17th Dallas Circuits and Systems Conference (DCAS)10.1109/DCAS61159.2024.10539862(1-5)Online publication date: 19-Apr-2024
https://doi.org/10.1109/DCAS61159.2024.10539862
Yao YHong HWang SXiao C(2024)Decomposition based estimation of distribution algorithm for high-level synthesis design space explorationIntegration10.1016/j.vlsi.2024.102292(102292)Online publication date: Oct-2024
https://doi.org/10.1016/j.vlsi.2024.102292
Sengupta AAnshul A(2024)Hardware Security of Image Processing Cores Against IP Piracy Using PSO-Based HLS-Driven Multi-Stage Encryption Fused with Fingerprint SignatureSN Computer Science10.1007/s42979-024-03255-95:7Online publication date: 9-Oct-2024
https://doi.org/10.1007/s42979-024-03255-9
Tu KTang XYu CJosipović LChu ZTu KTang XYu CJosipović LChu Z(2024)Logic SynthesisFPGA EDA10.1007/978-981-99-7755-0_9(135-164)Online publication date: 1-Feb-2024
https://doi.org/10.1007/978-981-99-7755-0_9
Lin CYi Y(2024)Enhancing FPGA CAD Flow with AI-Powered SolutionsAI-Enabled Electronic Circuit and System Design10.1007/978-3-031-71436-8_7(225-256)Online publication date: 17-Oct-2024
https://doi.org/10.1007/978-3-031-71436-8_7
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