research-article

Cross-layer racetrack memory design for ultra high density and low power consumption

Authors:

Hai (Helen) LiAuthors Info & Claims

DAC '13: Proceedings of the 50th Annual Design Automation Conference

Article No.: 53, Pages 1 - 6

https://doi.org/10.1145/2463209.2488799

Published: 29 May 2013 Publication History

Abstract

The racetrack memory technology utilizes magnetic domains along a nanoscopic wire to obtain ultra-high data storage density. The recent success in the planar racetrack nanowire promised its fabrication feasibility and future scalability, bringing more design challenges and opportunities. In this paper, we initialize the optimization of racetrack memory embracing design considerations across multiple layers, including cell design, array structure, architecture organization, and data management. Our evaluation shows that racetrack memory based cache can achieve 6.4x area reduction, 25% performance enhancement, and 62% energy saving, compared to STT-RAM cache design. The benefit over SRAM technology is even more significant.

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Cited By

Sima JBruck J(2023)Correcting Multiple Deletions and Insertions in Racetrack MemoryIEEE Transactions on Information Theory10.1109/TIT.2023.327976669:9(5619-5639)Online publication date: Sep-2023
https://doi.org/10.1109/TIT.2023.3279766
Gu JFeng CZhu HZhao ZYing ZLiu MChen RPan D(2023)SqueezeLight: A Multi-Operand Ring-Based Optical Neural Network With Cross-Layer ScalabilityIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.318956742:3(807-819)Online publication date: Mar-2023
https://doi.org/10.1109/TCAD.2022.3189567
Xu RSha EZhuge QSong YWang HShi L(2023)Optimizing Data Placement for Hybrid SRAM+Racetrack Memory SPM in Embedded SystemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.318554842:3(847-859)Online publication date: Mar-2023
https://doi.org/10.1109/TCAD.2022.3185548
Show More Cited By

Index Terms

Cross-layer racetrack memory design for ultra high density and low power consumption
1. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory

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cover image ACM Conferences

DAC '13: Proceedings of the 50th Annual Design Automation Conference

May 2013

1285 pages

ISBN:9781450320719

DOI:10.1145/2463209

Copyright © 2013 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

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SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 29 May 2013

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DAC '13

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DAC '13: The 50th Annual Design Automation Conference 2013

May 29 - June 7, 2013

Texas, Austin

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Sima JBruck J(2023)Correcting Multiple Deletions and Insertions in Racetrack MemoryIEEE Transactions on Information Theory10.1109/TIT.2023.327976669:9(5619-5639)Online publication date: Sep-2023
https://doi.org/10.1109/TIT.2023.3279766
Gu JFeng CZhu HZhao ZYing ZLiu MChen RPan D(2023)SqueezeLight: A Multi-Operand Ring-Based Optical Neural Network With Cross-Layer ScalabilityIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.318956742:3(807-819)Online publication date: Mar-2023
https://doi.org/10.1109/TCAD.2022.3189567
Xu RSha EZhuge QSong YWang HShi L(2023)Optimizing Data Placement for Hybrid SRAM+Racetrack Memory SPM in Embedded SystemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.318554842:3(847-859)Online publication date: Mar-2023
https://doi.org/10.1109/TCAD.2022.3185548
Khan AOllivier SHameed FCastrillon JJones A(2023)DownShift: Tuning Shift Reduction With Reliability for Racetrack MemoriesIEEE Transactions on Computers10.1109/TC.2023.325750972:9(2585-2599)Online publication date: 1-Sep-2023
https://doi.org/10.1109/TC.2023.3257509
Hakert CKhan AChen KHameed FCastrillon JChen J(2023) ROLLED: R acetrack Memory O ptimized L inear L ayout and E fficient D ecomposition of Decision Trees IEEE Transactions on Computers10.1109/TC.2022.319709472:5(1488-1502)Online publication date: 1-May-2023
https://doi.org/10.1109/TC.2022.3197094
Ollivier SLongofono SDutta PHu JBhanja SJones A(2023)Toward Comprehensive Shifting Fault Tolerance for Domain-Wall Memories With PIETTIEEE Transactions on Computers10.1109/TC.2022.318820672:4(1095-1109)Online publication date: 1-Apr-2023
https://doi.org/10.1109/TC.2022.3188206
Hameed FMaqsood MIrtaza S(2023)An energy-efficient cache replacement policy for ultra-dense racetrack memoryJournal of Systems Architecture10.1016/j.sysarc.2023.102837137(102837)Online publication date: Apr-2023
https://doi.org/10.1016/j.sysarc.2023.102837
Yang YChen SChang Y(2022)Evolving Skyrmion Racetrack Memory as Energy-Efficient Last-Level Cache DevicesProceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design10.1145/3531437.3539709(1-6)Online publication date: 1-Aug-2022
https://dl.acm.org/doi/10.1145/3531437.3539709
Chee YLe NVu V(2022)Robust Locally Positioning Sequences and Codes: Capacity, Constructions and Applications2022 IEEE International Symposium on Information Theory (ISIT)10.1109/ISIT50566.2022.9834761(516-521)Online publication date: 26-Jun-2022
https://doi.org/10.1109/ISIT50566.2022.9834761
Khan MGhosh S(2021)Comprehensive Study of Security and Privacy of Emerging Non-Volatile MemoriesJournal of Low Power Electronics and Applications10.3390/jlpea1104003611:4(36)Online publication date: 24-Sep-2021
https://doi.org/10.3390/jlpea11040036
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