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Efficiently tolerating timing violations in pipelined microprocessors

Published: 29 May 2013 Publication History

Abstract

Early prediction of an upcoming timing violation presents a tremendous opportunity to mask the performance overhead of tolerating these faults. In this paper, we explore several techniques for optimizing instruction scheduling in an Out-of-Order pipeline, exploiting this new perspective in robust system design. Compared to recently proposed stall based techniques for tolerating predictable timing violations, we demonstrate a massive reduction in performance overhead, while supporting correct execution in faulty environments (64--97% across different benchmarks).

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  • (2019)Time squeezing for tiny devicesProceedings of the 46th International Symposium on Computer Architecture10.1145/3307650.3322268(657-670)Online publication date: 22-Jun-2019
  • (2018)Dynamic Choke Sensing for Timing Error Resilience in NTC SystemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.275296326:1(1-10)Online publication date: Jan-2018
  • (2017)Scalable N-worst algorithms for dynamic timing and activity analysisProceedings of the 36th International Conference on Computer-Aided Design10.5555/3199700.3199778(585-592)Online publication date: 13-Nov-2017
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      cover image ACM Conferences
      DAC '13: Proceedings of the 50th Annual Design Automation Conference
      May 2013
      1285 pages
      ISBN:9781450320719
      DOI:10.1145/2463209
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 29 May 2013

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      Author Tags

      1. instruction scheduling
      2. path sensitization
      3. timing faults

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      Cited By

      View all
      • (2019)Time squeezing for tiny devicesProceedings of the 46th International Symposium on Computer Architecture10.1145/3307650.3322268(657-670)Online publication date: 22-Jun-2019
      • (2018)Dynamic Choke Sensing for Timing Error Resilience in NTC SystemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.275296326:1(1-10)Online publication date: Jan-2018
      • (2017)Scalable N-worst algorithms for dynamic timing and activity analysisProceedings of the 36th International Conference on Computer-Aided Design10.5555/3199700.3199778(585-592)Online publication date: 13-Nov-2017
      • (2017)Eliminating Timing Errors Through Collaborative Design to Maximize the ThroughputIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.258781025:2(670-682)Online publication date: 1-Feb-2017
      • (2017)Scalable N-worst algorithms for dynamic timing and activity analysis2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2017.8203830(585-592)Online publication date: Nov-2017
      • (2016)Optimistic clock adjustment for preventing Better-than-worst-case violations2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)10.1109/VLSI-SoC.2016.7753571(1-6)Online publication date: Sep-2016
      • (2016)Variability Mitigation in Nanometer CMOS Integrated Systems: A Survey of Techniques From Circuits to SoftwareProceedings of the IEEE10.1109/JPROC.2016.2518864104:7(1410-1448)Online publication date: Jul-2016
      • (2015)Graph-based Dynamic AnalysisProceedings of the IEEE/ACM International Conference on Computer-Aided Design10.5555/2840819.2840920(729-735)Online publication date: 2-Nov-2015
      • (2015)DARP-MPACM Transactions on Design Automation of Electronic Systems10.1145/275555821:1(1-21)Online publication date: 2-Dec-2015
      • (2015)Graph-based dynamic analysis: Efficient characterization of dynamic timing and activity distributions2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2015.7372642(729-735)Online publication date: Nov-2015
      • Show More Cited By

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