research-article

A novel analytical method for worst case response time estimation of distributed embedded systems

Authors:

Soonhoi HaAuthors Info & Claims

DAC '13: Proceedings of the 50th Annual Design Automation Conference

Article No.: 129, Pages 1 - 10

https://doi.org/10.1145/2463209.2488893

Published: 29 May 2013 Publication History

Abstract

In this paper, we propose a novel analytical method, called scheduling time bound analysis, to find a tight upper bound of the worst-case response time in a distributed real-time embedded system, considering execution time variations of tasks, jitter of input arrivals, and scheduling anomaly behavior in a multi-tasking system all together. By analyzing the graph topology and worst-case scheduling scenarios, we measure the conservative scheduling time bound of each task. The proposed method supports an arbitrary mixture of preemptive and non-preemptive processing elements. Its speed is comparable to compositional approaches while it gives a much tighter bound. The advantages of the proposed approach compared with related work were verified by experimental results with randomly generated task graphs and a real-life automotive application.

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Cited By

Gonopolskiy MGlonina A(2022)Research and Development of an Algorithm for Response Time Estimation in Multiprocessor Systems under Interval Uncertainty of Task Execution TimesAutomatic Control and Computer Sciences10.3103/S014641162107006355:7(658-669)Online publication date: 1-Feb-2022
https://doi.org/10.3103/S0146411621070063
Jeong DKim JOldja MHa S(2021)Parallel Scheduling of Multiple SDF Graphs Onto Heterogeneous ProcessorsIEEE Access10.1109/ACCESS.2021.30547259(20493-20507)Online publication date: 2021
https://doi.org/10.1109/ACCESS.2021.3054725
Kim JPark KYang HHa S(2021)Adaptive run-time scheduling of dependent services for service-oriented IoT systemsDesign Automation for Embedded Systems10.1007/s10617-021-09253-xOnline publication date: 7-Jul-2021
https://doi.org/10.1007/s10617-021-09253-x
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A novel analytical method for worst case response time estimation of distributed embedded systems

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cover image ACM Conferences

DAC '13: Proceedings of the 50th Annual Design Automation Conference

May 2013

1285 pages

ISBN:9781450320719

DOI:10.1145/2463209

Copyright © 2013 ACM.

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EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

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SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 29 May 2013

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DAC '13: The 50th Annual Design Automation Conference 2013

May 29 - June 7, 2013

Texas, Austin

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Gonopolskiy MGlonina A(2022)Research and Development of an Algorithm for Response Time Estimation in Multiprocessor Systems under Interval Uncertainty of Task Execution TimesAutomatic Control and Computer Sciences10.3103/S014641162107006355:7(658-669)Online publication date: 1-Feb-2022
https://doi.org/10.3103/S0146411621070063
Jeong DKim JOldja MHa S(2021)Parallel Scheduling of Multiple SDF Graphs Onto Heterogeneous ProcessorsIEEE Access10.1109/ACCESS.2021.30547259(20493-20507)Online publication date: 2021
https://doi.org/10.1109/ACCESS.2021.3054725
Kim JPark KYang HHa S(2021)Adaptive run-time scheduling of dependent services for service-oriented IoT systemsDesign Automation for Embedded Systems10.1007/s10617-021-09253-xOnline publication date: 7-Jul-2021
https://doi.org/10.1007/s10617-021-09253-x
Chai HZhang GSun JVajdi AHua JZhou J(2019)A Review of Recent Techniques in Mixed-Criticality SystemsJournal of Circuits, Systems and Computers10.1142/S021812661930007128:07(1930007)Online publication date: 27-Jun-2019
https://doi.org/10.1142/S0218126619300071
Choi JKang DHa S(2018)End-to-end latency analysis of cause-effect chains in an engine management system2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2018.8342196(1195-1198)Online publication date: Mar-2018
https://doi.org/10.23919/DATE.2018.8342196
Choi JYang HHa S(2018)Optimization of Fault-Tolerant Mixed-Criticality Multi-Core Systems with Enhanced WCRT AnalysisACM Transactions on Design Automation of Electronic Systems10.1145/327515424:1(1-26)Online publication date: 21-Dec-2018
https://dl.acm.org/doi/10.1145/3275154
Choi JOh HHa S(2018)A hybrid performance analysis technique for distributed real-time embedded systemsReal-Time Systems10.1007/s11241-018-9307-x54:3(562-604)Online publication date: 1-Jul-2018
https://dl.acm.org/doi/10.1007/s11241-018-9307-x
Sartor ALorenzon ACarro LKastensmidt FWong SBeck A(2017)Exploiting Idle Hardware to Provide Low Overhead Fault Tolerance for VLIW ProcessorsACM Journal on Emerging Technologies in Computing Systems10.1145/300193513:2(1-21)Online publication date: 6-Jan-2017
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Bouakaz AFradet PGirault A(2017)A Survey of Parametric Dataflow Models of ComputationACM Transactions on Design Automation of Electronic Systems10.1145/299953922:2(1-25)Online publication date: 20-Jan-2017
https://dl.acm.org/doi/10.1145/2999539
Enrici AApvrille LPacalet R(2017)A Model-Driven Engineering Methodology to Design Parallel and Distributed Embedded SystemsACM Transactions on Design Automation of Electronic Systems10.1145/299953722:2(1-25)Online publication date: 4-Jan-2017
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