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CoARX: a coprocessor for ARX-based cryptographic algorithms

Published: 29 May 2013 Publication History

Abstract

Cryptographic coprocessors are inherent part of modern System-on-Chips. It serves dual purpose - efficient execution of cryptographic kernels and supporting protocols for preventing IP-piracy. Flexibility in such coprocessors is required to provide protection against emerging cryptanalytic schemes and to support different cryptographic functions like encryption and authentication. In this context, a novel crypto-coprocessor, named CoARX, supporting multiple cryptographic algorithms based on Addition (A), Rotation (R) and eXclusive-or (X) operations is proposed. CoARX supports diverse ARX-based cryptographic primitives. We show that compared to dedicated hardware implementations and general-purpose microprocessors, it offers excellent performance-flexibility trade-off including adaptability to resist generic cryptanalysis.

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        cover image ACM Conferences
        DAC '13: Proceedings of the 50th Annual Design Automation Conference
        May 2013
        1285 pages
        ISBN:9781450320719
        DOI:10.1145/2463209
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        Published: 29 May 2013

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        Author Tags

        1. ARX
        2. CGRA
        3. coprocessor
        4. cryptography

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        • (2021)Cryptographic TechniquesEnergy-Efficient Modular Exponential Techniques for Public-Key Cryptography10.1007/978-3-030-74524-0_1(3-30)Online publication date: 14-Jul-2021
        • (2020)Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3IEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2020.2997916(1-14)Online publication date: 2020
        • (2020)Edge Crypt-Pi: Securing Internet of Things with Light and Fast Crypto-ProcessorProceedings of the Future Technologies Conference (FTC) 2020, Volume 310.1007/978-3-030-63092-8_50(749-761)Online publication date: 31-Oct-2020
        • (2019)Study of FlexibilityDomain Specific High-Level Synthesis for Cryptographic Workloads10.1007/978-981-10-1070-5_6(127-168)Online publication date: 29-Mar-2019
        • (2019)Manual Optimizations for Efficient DesignsDomain Specific High-Level Synthesis for Cryptographic Workloads10.1007/978-981-10-1070-5_5(91-125)Online publication date: 29-Mar-2019
        • (2019)IntroductionDomain Specific High-Level Synthesis for Cryptographic Workloads10.1007/978-981-10-1070-5_1(1-4)Online publication date: 29-Mar-2019
        • (2017)SPARXProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130616(990-995)Online publication date: 27-Mar-2017
        • (2017)SPARX — A side-channel protected processor for ARX-based cryptographyDesign, Automation & Test in Europe Conference & Exhibition (DATE), 201710.23919/DATE.2017.7927135(990-995)Online publication date: Mar-2017
        • (2017)RC4-AccSuite: A Hardware Acceleration Suite for RC4-Like Stream CiphersIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.260655425:3(1072-1084)Online publication date: Mar-2017
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