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Power and signal integrity challenges in 3D systems

Authors:

Miguel Miranda Corbalan,

Matt NowakAuthors Info & Claims

DAC '13: Proceedings of the 50th Annual Design Automation Conference

Article No.: 161, Pages 1 - 4

https://doi.org/10.1145/2463209.2488933

Published: 29 May 2013 Publication History

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Abstract

Power/signal delivering network for 2D systems comprising a package and an Integrated Circuit (IC) are design tasks that can be concurrently handled today. Design iterations can be locally carried out in each subsystem part without the need to modify the other one's decisions. This is unfortunately not the case in 2.5D/3D stacked systems. Finer system integration technology, either via Through Silicon Stack (TSS) and/or Through Silicon Interposer (TSI), involves tighter evaluation of the coupling effects in the system-wide PDN impedance and Signal Integrity (SI) characteristics. If these interactions are not properly accounted early in the design cycle, undesired design loop iterations, affecting design productivity is possible. Therefore, new tools and flows incorporating abstracted physical information of the PDN and signal interconnect stack architecture are needed for early design exploration. This paper elaborates on the problems, tool flows and methods necessary to address these challenges for 2.5D/3D stacked systems.

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Cited By

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Deogharia MKiran KDhiman R(2024)IR Drop Analysis for Power Integrity in 3D ICs2024 International Conference on Integrated Circuits, Communication, and Computing Systems (ICIC3S)10.1109/ICIC3S61846.2024.10603106(1-5)Online publication date: 8-Jun-2024
https://doi.org/10.1109/ICIC3S61846.2024.10603106
Dieng KArtillan PBermond CGuiller OLacrevaz TJoblot SHouzet GFarcy ALamy YFlechet B(2015)Through Silicon Capacitors (TSC) for noise reduction in Power Distribution Network2015 IEEE 65th Electronic Components and Technology Conference (ECTC)10.1109/ECTC.2015.7159600(247-253)Online publication date: May-2015
https://doi.org/10.1109/ECTC.2015.7159600
Zhang XLin JWickramanayaka SZhang SWeerasekera RDutta RChang KChui KLi HWee Ho DDing LKatti GBhattacharya SKwong D(2015)Heterogeneous 2.5D integration on through silicon interposerApplied Physics Reviews10.1063/1.49214632:2(021308)Online publication date: Jun-2015
https://doi.org/10.1063/1.4921463
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Index Terms

Power and signal integrity challenges in 3D systems
1. Hardware
  1. Integrated circuits
    1. Interconnect

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Published In

DAC '13: Proceedings of the 50th Annual Design Automation Conference

May 2013

1285 pages

ISBN:9781450320719

DOI:10.1145/2463209

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 29 May 2013

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DAC '13: The 50th Annual Design Automation Conference 2013

May 29 - June 7, 2013

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Deogharia MKiran KDhiman R(2024)IR Drop Analysis for Power Integrity in 3D ICs2024 International Conference on Integrated Circuits, Communication, and Computing Systems (ICIC3S)10.1109/ICIC3S61846.2024.10603106(1-5)Online publication date: 8-Jun-2024
https://doi.org/10.1109/ICIC3S61846.2024.10603106
Dieng KArtillan PBermond CGuiller OLacrevaz TJoblot SHouzet GFarcy ALamy YFlechet B(2015)Through Silicon Capacitors (TSC) for noise reduction in Power Distribution Network2015 IEEE 65th Electronic Components and Technology Conference (ECTC)10.1109/ECTC.2015.7159600(247-253)Online publication date: May-2015
https://doi.org/10.1109/ECTC.2015.7159600
Zhang XLin JWickramanayaka SZhang SWeerasekera RDutta RChang KChui KLi HWee Ho DDing LKatti GBhattacharya SKwong D(2015)Heterogeneous 2.5D integration on through silicon interposerApplied Physics Reviews10.1063/1.49214632:2(021308)Online publication date: Jun-2015
https://doi.org/10.1063/1.4921463
Guiller OJoblot SLamy YFarcy ADefay EDieng K(2014)Through Silicon Capacitor co-integrated with TSV as an efficient 3D decoupling capacitor solution for power management on silicon interposer2014 IEEE 64th Electronic Components and Technology Conference (ECTC)10.1109/ECTC.2014.6897459(1296-1302)Online publication date: May-2014
https://doi.org/10.1109/ECTC.2014.6897459

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Challenges in power-ground integrity

Modeling, analysis, and application of leakage induced damping effect for power supply integrity

Ultra-low-power signaling challenges for subthreshold global interconnects

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