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New ERA: new efficient reliability-aware wear leveling for endurance enhancement of flash storage devices

Published: 29 May 2013 Publication History

Abstract

As the program/erase (P/E) cycles of flash memory keep decreasing, improving the lifetime/endurance of flash memory has become a fundamental issue in the design of flash devices. This work is motivated by the observation that flash blocks endured the same P/E cycles usually have different bit error rates. In contrast to the existing wear-leveling techniques that try to distribute erases to flash blocks as evenly as possible, we propose an efficient reliability-aware wear-leveling scheme to distribute block erases based on the bit error rates of blocks so as to even out the error rate among flash blocks, to maximize the number of good blocks, and thus to ultimately prolong the lifetime of flash storage devices. The experiments were conducted based on representative realistic workloads to evaluate the efficacy of the proposed scheme, for which the results are very encouraging.

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cover image ACM Conferences
DAC '13: Proceedings of the 50th Annual Design Automation Conference
May 2013
1285 pages
ISBN:9781450320719
DOI:10.1145/2463209
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 29 May 2013

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Author Tags

  1. endurance
  2. flash memory
  3. reliability
  4. wear leveling

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Cited By

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  • (2023)Data Freshness Optimization on Networked Intermittent Systems2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE56975.2023.10136912(1-6)Online publication date: Apr-2023
  • (2023)Retention-Aware Read Acceleration Strategy for LDPC-Based NAND Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.328932842:12(4597-4605)Online publication date: Dec-2023
  • (2023)DTC: A Drift-Tolerant Coding to Improve the Performance and Energy Efficiency of -Level-Cell Phase-Change MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.324156342:10(3185-3195)Online publication date: Oct-2023
  • (2023)LDPC Level Prediction Toward Read Performance of High-Density Flash MemoriesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.323884542:10(3264-3274)Online publication date: Oct-2023
  • (2023)ADLPT: Improving 3D NAND Flash Memory Reliability by Adaptive Lifetime Prediction TechniquesIEEE Transactions on Computers10.1109/TC.2022.321411572:6(1525-1538)Online publication date: 1-Jun-2023
  • (2023)FSD: File-related Secure Deletion to Prolong the Lifetime of Solid-State Drives2023 IEEE 12th Non-Volatile Memory Systems and Applications Symposium (NVMSA)10.1109/NVMSA58981.2023.00015(19-24)Online publication date: Aug-2023
  • (2023)REFROM: Responsive, Energy-Efficient Frame Rendering for Mobile Devices2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)10.1109/ISLPED58423.2023.10244482(1-6)Online publication date: 7-Aug-2023
  • (2022)Drift-tolerant Coding to Enhance the Energy Efficiency of Multi-Level-Cell Phase-Change MemoryProceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design10.1145/3531437.3539701(1-6)Online publication date: 1-Aug-2022
  • (2022)EddySuperblock: Improving NAND Flash Efficiency and Lifetime by Endurance-Driven Dynamic Superblock ManagementIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2021.312686230:1(95-107)Online publication date: Jan-2022
  • (2022)LLSM: A Lifetime-Aware Wear-Leveling for LSM-Tree on NAND Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.319754241:11(3946-3956)Online publication date: Nov-2022
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