skip to main content
10.1145/2463209.2488942acmconferencesArticle/Chapter ViewAbstractPublication PagesdacConference Proceedingsconference-collections
research-article

Distributed run-time resource management for malleable applications on many-core platforms

Published: 29 May 2013 Publication History

Abstract

Todays prevalent solutions for modern embedded systems and general computing employ many processing units connected by an on-chip network leaving behind complex superscalar architectures In this paper, we couple the concept of distributed computing with parallel applications and present a workload-aware distributed run-time framework for malleable applications on many-core platforms. The presented framework is responsible for serving in a distributed way and at run-time, the needs of malleable applications, maximizing resource utilization avoiding dominating effects and taking into account the type of processors supporting platform heterogeneity, while having a small overhead in overall inter-core communication. Our framework has been implemented as part of a C simulator and additionally as a run-time service on the Single-Chip Cloud Computer (SCC), an experimental processor created by Intel Labs, and we compared it against a state-of-art run-time resource manager. Experimental results showed that our framework has on average 70% less messages, 64% smaller message size and 20% application speed-up gain.

References

[1]
M. A. Al Faruque et al. Adam: run-time agent-based distributed application mapping for on-chip communication. In Proc. of DAC, pages 760--765. ACM, 2008.
[2]
I. Anagnostopoulos et al. A divide and conquer based distributed run-time mapping methodology for many-core platforms. In Proc. of DATE, pages 111--116, 2012.
[3]
A. Beguelin et al. Application level fault tolerance in heterogeneous networks of workstations. J. Parallel Distrib. Comput., 43(2):147--155, June 1997.
[4]
Y. Cui et al. Decentralized agent based re-clustering for task mapping of tera-scale network-on-chip system. In Proc. of ISCAS, pages 2437--2440. IEEE, 2012.
[5]
D. Feitelson. Parallel Workloads Archive, http://www.cs.huji.ac.il/labs/parallel/workload.
[6]
T. Desell et al. Malleable applications for scalable high performance computing. Cluster Computing, 10(3):323--337, 2007.
[7]
A. B. Downey. A model for speedup of parallel programs. Technical report, 1997.
[8]
D. G. Feitelson and L. Rudolph. Toward convergence in job schedulers for parallel supercomputers. In Proc. of JSSPP, pages 1--26. Springer-Verlag, 1996.
[9]
K. Goossens et al. Æhereal network on chip: Concepts, architectures, and implementations. IEEE Des. Test, 22(5):414--421, 2005.
[10]
J. Howard et al. A 48-core ia-32 message-passing processor with dvfs in 45nm cmos. In Proc. of ISSCC, pages 108--109, feb. 2010.
[11]
Intel. The Intel® Xeon Phi#8482; Coprocessor, http://www.intel.com/content/www/us/en/high-performance-computing/high-performance-xeon-phi-coprocessor-brief.html.
[12]
S. Kobbe et al. DistRM: distributed resource management for on-chip many-core systems. In Proc. of CODES+ISSS, pages 119--128. ACM, 2011.
[13]
S. Kounev et al. Towards self-aware performance and resource management in modern service-oriented systems. In Proc. of SCC, pages 621--624. IEEE CS, 2010.
[14]
V. Nollet et al. Centralized run-time resource management in a network-on-chip containing reconfigurable hardware tiles. In Proc. of DATE, pages 234--239. IEEE CS, 2005.
[15]
G. Sabin et al. Moldable parallel job scheduling using job efficiency: an iterative approach. In Proc. of JSSPP, pages 94--114. Springer-Verlag, 2007.
[16]
L. Seiler et al. Larrabee: a many-core x86 architecture for visual computing. ACM Trans. Graph., 27:18:1--18:15, August 2008.
[17]
STMicroelectronics. STNoC: Building a new system-on-chip paradigm. White Paper, 2005.
[18]
S. Vangal et al. An 80-Tile 1.28 TFLOPS Network-on-Chip in 65nm CMOS. In Proc. of ISSCC, pages 98--589. IEEE, 2007.

Cited By

View all
  • (2023)An Ageing-Aware and Temperature Mapping Algorithm for Multilevel Cache NodesIEEE Access10.1109/ACCESS.2022.317408411(19162-19172)Online publication date: 2023
  • (2021)Dynamic Mapping for Many-cores using Management Application Organization2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)10.1109/ICECS53924.2021.9665547(1-6)Online publication date: 28-Nov-2021
  • (2021)Defending against Thermal Covert Channel Attacks by Task Migration in Many-core System2021 IEEE 3rd International Conference on Circuits and Systems (ICCS)10.1109/ICCS52645.2021.9697251(111-120)Online publication date: 29-Oct-2021
  • Show More Cited By

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences
DAC '13: Proceedings of the 50th Annual Design Automation Conference
May 2013
1285 pages
ISBN:9781450320719
DOI:10.1145/2463209
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

In-Cooperation

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 29 May 2013

Permissions

Request permissions for this article.

Check for updates

Qualifiers

  • Research-article

Conference

DAC '13
Sponsor:

Acceptance Rates

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25
62nd ACM/IEEE Design Automation Conference
June 22 - 26, 2025
San Francisco , CA , USA

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)1
  • Downloads (Last 6 weeks)1
Reflects downloads up to 08 Mar 2025

Other Metrics

Citations

Cited By

View all
  • (2023)An Ageing-Aware and Temperature Mapping Algorithm for Multilevel Cache NodesIEEE Access10.1109/ACCESS.2022.317408411(19162-19172)Online publication date: 2023
  • (2021)Dynamic Mapping for Many-cores using Management Application Organization2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)10.1109/ICECS53924.2021.9665547(1-6)Online publication date: 28-Nov-2021
  • (2021)Defending against Thermal Covert Channel Attacks by Task Migration in Many-core System2021 IEEE 3rd International Conference on Circuits and Systems (ICCS)10.1109/ICCS52645.2021.9697251(111-120)Online publication date: 29-Oct-2021
  • (2020)Combinatorial Auctions for Temperature-Constrained Resource Management in ManycoresIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2020.296552331:7(1605-1620)Online publication date: 1-Jul-2020
  • (2020)Power- and Cache-Aware Task Mapping with Dynamic Power Budgeting for Many-CoresIEEE Transactions on Computers10.1109/TC.2019.293544669:1(1-13)Online publication date: 1-Jan-2020
  • (2020)Dynamic Allocation/Reallocation of Dark Cores in Many-Core Systems for Improved System PerformanceIEEE Access10.1109/ACCESS.2020.30225098(165693-165707)Online publication date: 2020
  • (2019)On Runtime Communication and Thermal-Aware Application Mapping and Defragmentation in 3D NoC SystemsIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2019.292154230:12(2775-2789)Online publication date: 1-Dec-2019
  • (2019)Thermally Composable Hybrid Application Mapping for Real-Time Applications in Heterogeneous Many-Core Systems2019 IEEE Real-Time Systems Symposium (RTSS)10.1109/RTSS46320.2019.00029(220-232)Online publication date: Dec-2019
  • (2018)Exploiting dark cores for performance optimization via patterning for many-core chips in the dark silicon eraProceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip10.5555/3306619.3306636(1-8)Online publication date: 4-Oct-2018
  • (2018)SPA: Simple pool architecture for application resource allocation in many-core systems2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2018.8342225(1364-1368)Online publication date: Mar-2018
  • Show More Cited By

View Options

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Figures

Tables

Media

Share

Share

Share this Publication link

Share on social media