research-article

InTimeFix: a low-cost and scalable technique for in-situ timing error masking in logic circuits

Authors:

Qiang XuAuthors Info & Claims

DAC '13: Proceedings of the 50th Annual Design Automation Conference

Article No.: 183, Pages 1 - 6

https://doi.org/10.1145/2463209.2488959

Published: 29 May 2013 Publication History

Abstract

With technology scaling, integrated circuits (ICs) suffer from increasing process, voltage, and temperature (PVT) variations and adverse aging effects. In most cases, these reliability threats manifest themselves as timing errors on critical speed-paths of the circuit, if a large design guard band is not reserved. This work presents a novel in-situ timing error masking technique, namely InTimeFix, by introducing fine-grained redundant approximation circuit into the design to provide more timing slack for speed-paths. The synthesis of the redundant circuit relies on simple structural analysis of the original circuit, which is easily scalable to large IC designs. Experimental results show that InTimeFix significantly increases circuit timing slack with low area/power cost.

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Cited By

He YChen ZXiang XZhu T(2020)A Dedicated Greedy Short Path Padding Solution Method for Error Resilient Circuit DesignsIEEE Access10.1109/ACCESS.2020.30322548(190251-190262)Online publication date: 2020
https://doi.org/10.1109/ACCESS.2020.3032254
Rahimi ABenini LGupta R(2016)Variability Mitigation in Nanometer CMOS Integrated Systems: A Survey of Techniques From Circuits to SoftwareProceedings of the IEEE10.1109/JPROC.2016.2518864104:7(1410-1448)Online publication date: Jul-2016
https://doi.org/10.1109/JPROC.2016.2518864
Ibrahim AValle M(2016)Resiliency in nanometer CMOS systems: An overview2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)10.1109/ICECS.2016.7841257(536-539)Online publication date: Dec-2016
https://doi.org/10.1109/ICECS.2016.7841257
Show More Cited By

Index Terms

InTimeFix: a low-cost and scalable technique for in-situ timing error masking in logic circuits
1. Hardware

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cover image ACM Conferences

DAC '13: Proceedings of the 50th Annual Design Automation Conference

May 2013

1285 pages

ISBN:9781450320719

DOI:10.1145/2463209

Copyright © 2013 ACM.

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Published: 29 May 2013

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May 29 - June 7, 2013

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Cited By

He YChen ZXiang XZhu T(2020)A Dedicated Greedy Short Path Padding Solution Method for Error Resilient Circuit DesignsIEEE Access10.1109/ACCESS.2020.30322548(190251-190262)Online publication date: 2020
https://doi.org/10.1109/ACCESS.2020.3032254
Rahimi ABenini LGupta R(2016)Variability Mitigation in Nanometer CMOS Integrated Systems: A Survey of Techniques From Circuits to SoftwareProceedings of the IEEE10.1109/JPROC.2016.2518864104:7(1410-1448)Online publication date: Jul-2016
https://doi.org/10.1109/JPROC.2016.2518864
Ibrahim AValle M(2016)Resiliency in nanometer CMOS systems: An overview2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)10.1109/ICECS.2016.7841257(536-539)Online publication date: Dec-2016
https://doi.org/10.1109/ICECS.2016.7841257
Kahng AKang SLi JPineda De Gyvez J(2015)An Improved Methodology for Resilient Design ImplementationACM Transactions on Design Automation of Electronic Systems10.1145/274946220:4(1-26)Online publication date: 28-Sep-2015
https://dl.acm.org/doi/10.1145/2749462
Kahng AKang SLi JCavallaro JZhang TJones ALi H(2014)A new methodology for reduced cost of resilienceProceedings of the 24th edition of the great lakes symposium on VLSI10.1145/2591513.2591600(157-162)Online publication date: 20-May-2014
https://dl.acm.org/doi/10.1145/2591513.2591600
Zhang JYuan FYe RXu QHenkel J(2013)ForTERProceedings of the International Conference on Computer-Aided Design10.5555/2561828.2561839(55-60)Online publication date: 18-Nov-2013
https://dl.acm.org/doi/10.5555/2561828.2561839
Zhang JYuan FYe RXu Q(2013)ForTER: A forward error correction scheme for timing error resilience2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2013.6691097(55-60)Online publication date: Nov-2013
https://doi.org/10.1109/ICCAD.2013.6691097

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