research-article

Dual pillar spin-transfer torque MRAMs for low power applications

Authors:

Niladri N. Mojumder,

Charles Augustine,

Sumeet K. Gupta,

Sri Harsha Choday,

Kaushik RoyAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 9, Issue 2

Article No.: 14, Pages 1 - 17

https://doi.org/10.1145/2463585.2463590

Published: 29 May 2013 Publication History

Abstract

Electron-spin based data storage for on-chip memories has the potential for ultra-high density, low power consumption, very high endurance, and reasonably low read/write latency. In this article, we discuss the design challenges associated with spin-transfer torque (STT) MRAM in its state-of-the-art configuration. We propose an alternative bit cell configuration and three new genres of magnetic tunnel junction (MTJ) structures to improve STT-MRAM bit cell stabilities, write endurance, and reduce write energy consumption. The proposed multi-port, multi-pillar MTJ structures offer the unique possibility of electrical and spatial isolation of memory read and write. In order to realize ultralow power under process variations, we propose device, bit-cell and architecture level design techniques. Such design alternatives at multiple levels of design abstraction has been found to achieve substantially enhanced robustness, density, reliability and low power as compared to their charge-based counterparts for future embedded applications.

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Cited By

Cao QLü WWang XGuan XWang LYan SWu TWang X(2020)Nonvolatile Multistates Memories for High-Density Data StorageACS Applied Materials & Interfaces10.1021/acsami.0c1018412:38(42449-42471)Online publication date: 19-Aug-2020
https://doi.org/10.1021/acsami.0c10184
Jain SRanjan ARoy KRaghunathan A(2018)Computing in Memory With Spin-Transfer Torque Magnetic RAMIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.277695426:3(470-483)Online publication date: 1-Mar-2018
https://dl.acm.org/doi/10.1109/TVLSI.2017.2776954
Fong XRoy K(2017)On-Chip Non-volatile STT-MRAM for Zero-Standby PowerEnabling the Internet of Things10.1007/978-3-319-51482-6_7(213-246)Online publication date: 26-Jan-2017
https://doi.org/10.1007/978-3-319-51482-6_7
Show More Cited By

Index Terms

Dual pillar spin-transfer torque MRAMs for low power applications
1. Hardware
  1. Integrated circuits
    1. Semiconductor memory

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Published In

cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 9, Issue 2

Special issue on memory technologies

May 2013

133 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/2463585

Issue’s Table of Contents

Copyright © 2013 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 29 May 2013

Accepted: 01 April 2011

Received: 17 January 2011

Revised: 12 January 2011

Published in JETC Volume 9, Issue 2

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Nano-electronics Research Initiative (NRI) under INDEX center

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Cited By

Cao QLü WWang XGuan XWang LYan SWu TWang X(2020)Nonvolatile Multistates Memories for High-Density Data StorageACS Applied Materials & Interfaces10.1021/acsami.0c1018412:38(42449-42471)Online publication date: 19-Aug-2020
https://doi.org/10.1021/acsami.0c10184
Jain SRanjan ARoy KRaghunathan A(2018)Computing in Memory With Spin-Transfer Torque Magnetic RAMIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.277695426:3(470-483)Online publication date: 1-Mar-2018
https://dl.acm.org/doi/10.1109/TVLSI.2017.2776954
Fong XRoy K(2017)On-Chip Non-volatile STT-MRAM for Zero-Standby PowerEnabling the Internet of Things10.1007/978-3-319-51482-6_7(213-246)Online publication date: 26-Jan-2017
https://doi.org/10.1007/978-3-319-51482-6_7
Vatajelu EPouyan PHamdioui S(2017)State of the art and challenges for test and reliability of emerging nonvolatile resistive memoriesInternational Journal of Circuit Theory and Applications10.1002/cta.241846:1(4-28)Online publication date: 5-Oct-2017
https://doi.org/10.1002/cta.2418
Fong XKim YVenkatesan RChoday SRaghunathan ARoy K(2016)Spin-Transfer Torque Memories: Devices, Circuits, and SystemsProceedings of the IEEE10.1109/JPROC.2016.2521712104:7(1449-1488)Online publication date: Jul-2016
https://doi.org/10.1109/JPROC.2016.2521712
Fong XRoy K(2013)Robust low-power multi-terminal STT-MRAM2013 13th Non-Volatile Memory Technology Symposium (NVMTS)10.1109/NVMTS.2013.6851056(1-4)Online publication date: Aug-2013
https://doi.org/10.1109/NVMTS.2013.6851056

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