research-article

NoC simulation in heterogeneous architectures for PGAS programming model

Authors:

Andreas Weichslgartner,

Jürgen TeichAuthors Info & Claims

M-SCOPES '13: Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems

Pages 77 - 85

https://doi.org/10.1145/2463596.2463606

Published: 19 June 2013 Publication History

Abstract

Multi- and many-core systems become more and more mainstream and therefore new communication infrastructures like Networks-on-Chip (NoC) and new programming languages like IBM's X10 with its partitioned global address space (PGAS) are introduced. In this paper we present an X10-based simulator, which is capable to simulate the network traffic that occurs inside the X10 program. This holistic approach enables to simulate the functionality and the indicated traffic together, in contrast to pure network simulators where usually only synthetic traffic or traces are used. We explain how the communication overhead is extracted from the X10 run-time and how to simulate the NoC behavior. In experiments we show that the proposed simulator is up to 10 x faster than a comparable SystemC-based simulator and at the same time preserves high accuracy. Furthermore, we present a quality and simulation speed tradeoff by using different simulation modes for a set of real world parallel applications.

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Cited By

Roloff SHannig FTeich J(2017)High performance network-on-chip simulation by interval-based timing predictionsProceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia10.1145/3139315.3139320(2-11)Online publication date: 15-Oct-2017
https://dl.acm.org/doi/10.1145/3139315.3139320

Index Terms

NoC simulation in heterogeneous architectures for PGAS programming model

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cover image ACM Other conferences

M-SCOPES '13: Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems

June 2013

110 pages

ISBN:9781450321426

DOI:10.1145/2463596

General Chair:
Henk Corporaal
Eindhoven University of Technology, NL
,
Program Chair:
Sander Stuijk
Eindhoven University of Technology, NL

Copyright © 2013 ACM.

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EDAA: European Design Automation Association

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SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 19 June 2013

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Deutsche Forschungsgemeinschaft

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M-SCOPES '13

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EDAA

M-SCOPES '13: International Workshop on Software and Compilers for Embedded Systems

June 19 - 21, 2013

St. Goar, Germany

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M-SCOPES '13 Paper Acceptance Rate 9 of 16 submissions, 56%;

Overall Acceptance Rate 38 of 79 submissions, 48%

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Cited By

Roloff SHannig FTeich J(2017)High performance network-on-chip simulation by interval-based timing predictionsProceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia10.1145/3139315.3139320(2-11)Online publication date: 15-Oct-2017
https://dl.acm.org/doi/10.1145/3139315.3139320

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