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From 1G to 10G: code reuse in action

Published: 18 June 2013 Publication History

Abstract

Ever increasing traffic quantities and link-bandwidths force network devices to meet ever-increasing demands; the march to 100G is well under way. The high-speed networking of today is no longer that of five years ago: Unfortunately, such growth contrasts with current financial forces and this leads organisations to find ways to save money. As a result many developers face the common problem: how to make existing, systems reusable in this new, higher-speed scenario? To attack this problem, we propose new, flexible, legacy support mechanics for designs built using System on a Chip (SoC) and System on FPGA (SoFPGA). We illustrate our approach using the widely used, open-source, NetFPGA platform presenting a migration path for existing 1G designs to plugin into the new NetFPGA 10G board without alteration to code structure.

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  • (2016)The high speed switching experiment based on NetFPGA SUME2016 11th International Conference on Computer Science & Education (ICCSE)10.1109/ICCSE.2016.7581657(652-657)Online publication date: Aug-2016
  • (2016)A modular architecture for dynamically reconfigurable middlebox with customized reconfiguration handler2016 International Conference on Field-Programmable Technology (FPT)10.1109/FPT.2016.7929539(225-228)Online publication date: Dec-2016
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cover image ACM Conferences
HPPN '13: Proceedings of the first edition workshop on High performance and programmable networking
June 2013
70 pages
ISBN:9781450319812
DOI:10.1145/2465839
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 18 June 2013

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Author Tags

  1. NetFPGA
  2. protocol bridges
  3. reusable hardware

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Cited By

View all
  • (2019)A Survey on Data Plane Flexibility and Programmability in Software-Defined NetworkingIEEE Access10.1109/ACCESS.2019.29101407(47804-47840)Online publication date: 2019
  • (2016)The high speed switching experiment based on NetFPGA SUME2016 11th International Conference on Computer Science & Education (ICCSE)10.1109/ICCSE.2016.7581657(652-657)Online publication date: Aug-2016
  • (2016)A modular architecture for dynamically reconfigurable middlebox with customized reconfiguration handler2016 International Conference on Field-Programmable Technology (FPT)10.1109/FPT.2016.7929539(225-228)Online publication date: Dec-2016
  • (2016)A Secured OpenFlow-Based Switch Architecture2016 International Conference on Advanced Computing and Applications (ACOMP)10.1109/ACOMP.2016.021(83-89)Online publication date: Nov-2016
  • (2014)Test and monitoring of LTE network: A step towards low cost solutions based on NetFPGA2014 IEEE Latin-America Conference on Communications (LATINCOM)10.1109/LATINCOM.2014.7041893(1-5)Online publication date: Nov-2014
  • (2014)rrBox: Remote dynamically reconfigurable middlebox using NetFPGA2014 14th International Symposium on Communications and Information Technologies (ISCIT)10.1109/ISCIT.2014.7011943(409-413)Online publication date: Sep-2014

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