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Efficient modulo 2n+1 multiplication for the idea block cipher

Published: 02 May 2013 Publication History

Abstract

International Data Encryption Algorithm (IDEA) is a popular and secure cryptography algorithm, suitable for hardware implementation. IDEA comprises of modulo 216 additions, bitwise exclusive-OR operations and modulo 216+1 multiplications of 16-bit words. Among them, modulo 216+1 multiplication is the most time, space and power consuming operation. In this work, we propose an efficient modulo 2n+1 modified Booth multiplication algorithm which is adapted to operands used in the IDEA. The IDEA multiplier based on the proposed modulo 2n+1 multiplication algorithm yields area and power advantages of up to 12% and 14% respectively, compared to the already proposed modulo 2n+1 multiplier designs. The implementation of a single round of the IDEA block cipher based on the proposed multiplier verifies the area and power advantages over the implementations based on existing modulo 2n+1 multipliers.

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cover image ACM Conferences
GLSVLSI '13: Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
May 2013
368 pages
ISBN:9781450320320
DOI:10.1145/2483028
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 02 May 2013

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Author Tags

  1. encryption
  2. idea
  3. modulo arithmetic.
  4. parallel multiplier

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GLSVLSI '13 Paper Acceptance Rate 76 of 238 submissions, 32%;
Overall Acceptance Rate 312 of 1,156 submissions, 27%

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