Claudiu-Teodor Chirap
ABSTRACT
High throughput applications have been widely used for deployment onto FPGAs. As the requirements for performance increase so does the challenge of integrating more complex algorithms into these platforms. This paper presents a flexible, low resource usage method which can be configured to integrate large designs into multiple FPGA chips using Xilinx's high-speed serial interfaces that minimize the performance penalty due to chip-to-chip communication. The proposed solution also provides a way of sharing the same data link for multiple applications, which offers valuable support for distributed FPGA applications with a minimal overhead and configurable bandwidth division. The impact of using this method inside a new application should not require complex architectural changes. The design was successfully validated and then applied onto a set of open-source cores.
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Index Terms
- A flexible communication method for multi-FPGA based designs
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