research-article

SI-TM: reducing transactional memory abort rates through snapshot isolation

Authors:

David Cheriton,

Amin Firoozshahian,

John P. StevensonAuthors Info & Claims

ASPLOS '14: Proceedings of the 19th international conference on Architectural support for programming languages and operating systems

Pages 383 - 398

https://doi.org/10.1145/2541940.2541952

Published: 24 February 2014 Publication History

Abstract

Transactional memory represents an attractive conceptual model for programming concurrent applications. Unfortunately, high transaction abort rates can cause significant performance degradation. Conventional transactional memory realizations not only pessimistically abort transactions on every read-write conflict but also because of false sharing, cache evictions, TLB misses, page faults and interrupts. Consequently, the use of transactions needs to be restricted to a very small number of operations to achieve predictable performance, thereby, limiting its benefit to programming simplification. In this paper, we investigate snapshot isolation transactional memory in which transactions operate on memory snapshots that always guarantee consistent reads. By exploiting snapshots, an established database model of transactions, transactions can ignore read-write conflicts and only need to abort on write-write conflicts. Our implementation utilizes a memory controller that supports multiversion memory, to efficiently support snapshotting in hardware.We show that snapshot isolation can reduce the number of aborts in some cases by three orders of magnitude and improve performance by up to 20x.

References

[1]

A.R. Adl-Tabatabai and T. Shpeisman. Draft specification of transactional language constructs for c

[2]

. In Specification Draft, 2009.

[3]

C.S. Ananian, K. Asanovic, B.C. Kuszmaul, C.E. Leiserson, and S. Lie. Unbounded transactional memory. In 11th International Symposium on High-Performance Computer Architecture, (HPCA-11). IEEE, 2005.

Digital Library

[4]

M. Ansari, M. Luján, C. Kotselidis, K. Jarvis, C. Kirkham, and I. Watson. Steal-on-abort: Improving transactional memory performance through dynamic transaction reordering. High Performance Embedded Architectures and Compilers, 2009.

Digital Library

[5]

U. Aydonat and T.S. Abdelrahman. Hardware support for relaxed concurrency control in transactional memory. In Microarchitecture (MICRO), 2010 43rd Annual IEEE/ACM International Symposium on. IEEE, 2010.

Digital Library

[6]

Utku Aydonat and Tarek Abdelrahman. Serializability of transactions in software transactional memory. In Second ACM SIGPLAN Workshop on Transactional Computing, 2008.

[7]

H. Berenson, P. Bernstein, J. Gray, J. Melton, E. O'Neil, and P. O'Neil. A critique of ansi sql isolation levels. ACM SIGMOD Record, 1995.

Digital Library

[8]

B.H. Bloom. Space/time trade-offs in hash coding with allowable errors. Communications of the ACM, 1970.

Digital Library

[9]

Colin Blundell, Arun Raghavan, and Milo M.K. Martin. Retcon: transactional repair without replay. In Proceedings of the 37th annual international symposium on Computer architecture, ISCA '10, New York, NY, USA, 2010. ACM.

Digital Library

[10]

J. Bobba, N. Goyal, M.D. Hill, M.M. Swift, and D.A. Wood. Tokentm: Efficient execution of large transactions with hardware transactional memory. In ACM SIGARCH Computer Architecture News. IEEE Computer Society, 2008.

Digital Library

[11]

J. Bobba, K.E. Moore, H. Volos, L. Yen, M.D. Hill, M.M. Swift, and D.A. Wood. Performance pathologies in hardware transactional memory. In ACM SIGARCH Computer Architecture News, pages 81--91. ACM, 2007.

Digital Library

[12]

M.J. Cahill, U. Röhm, and A.D. Fekete. Serializable isolation for snapshot databases. ACM Transactions on Database Systems (TODS), 2009.

Digital Library

[13]

Harold W. Cain, Maged M. Michael, Brad Frey, Cathy May, Derek Williams, and Hung Le. Robust architectural support for transactional memory in the power architecture. In Proceedings of the 40th Annual International Symposium on Computer Architecture, ISCA '13, pages 225--236, New York, NY, USA, 2013. ACM.

Digital Library

[14]

Luis Ceze, James Tuck, Pablo Montesinos, and Josep Torrellas. Bulksc: bulk enforcement of sequential consistency. In ACM SIGARCH Computer Architecture News, pages 278--289. ACM, 2007.

Digital Library

[15]

Hassan Chafi, Jared Casper, Brian D Carlstrom, Austen McDonald, Chi Cao Minh, Woongki Baek, Christos Kozyrakis, and Kunle Olukotun. A scalable, non-blocking approach to transactional memory. In High Performance Computer Architecture, 2007. HPCA 2007. IEEE 13th International Symposium on, pages 97--108. IEEE, 2007.

Digital Library

[16]

D. Cheriton, A. Firoozshahian, A. Solomatnikov, J.P. Stevenson, and O. Azizi. Hicamp: architectural support for efficient concurrency-safe shared structured data access. In Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems. ACM, 2012.

Digital Library

[17]

Weihaw Chuang, Satish Narayanasamy, Ganesh Venkatesh, Jack Sampson, Michael Van Biesbrouck, Gilles Pokam, Brad Calder, and Osvaldo Colavin. Unbounded page-based transactional memory. In ACM Sigplan Notices. ACM, 2006.

Digital Library

[18]

J.C. Corbett, J. Dean, M. Epstein, A. Fikes, C. Frost, JJ Furman, S. Ghemawat, A. Gubarev, C. Heiser, and P. Hochschild. Spanner: Googles globally-distributed database. In Proceedings of the tenth Symposium on Operating System Design and Implementation (OSDI'12), Hollywood, CA, October, 2012. IEEE Computer Society, 2012.

Digital Library

[19]

L. Dalessandro, M.F. Spear, and M.L. Scott. Norec: streamlining stm by abolishing ownership records. In ACM Sigplan Notices. ACM, 2010.

Digital Library

[20]

P. Damron, A. Fedorova, Y. Lev, V. Luchangco, M. Moir, and D. Nussbaum. Hybrid transactional memory. In ACM Sigplan Notices. ACM, 2006.

Digital Library

[21]

R.J. Dias, J.M. Lourenço, and N.M. Preguiça. Efficient and correct transactional memory programs combining snapshot isolation and static analysis. In Proceedings of the 3rd USENIX conference on Hot topics in parallelism (HotPar'11), HotPar, volume 11, 2011.

[22]

Dave Dice, Ori Shalev, and Nir Shavit. Transactional locking ii. In Proceedings of the 20th international conference on Distributed Computing, DISC'06, pages 194--208, Berlin, Heidelberg, 2006. Springer-Verlag.

Digital Library

[23]

S. Elnikety, F. Pedone, and W. Zwaenepoel. Database replication using generalized snapshot isolation. In Reliable Distributed Systems, 2005. SRDS 2005. 24th IEEE Symposium on. IEEE, 2005.

Digital Library

[24]

Pascal Felber, Christof Fetzer, Patrick Marlier, and Torvald Riegel. Time-based software transactional memory. IEEE Transactions on Parallel and Distributed Systems, 21(12):1793--1807, 2010.

Digital Library

[25]

W.W.L. Fung, I. Singh, A. Brownsword, and T. Aamodt. Kilo tm: Hardware transactional memory for gpu architectures. Micro, IEEE, 2012.

Digital Library

[26]

Lance Hammond, Vicky Wong, Mike Chen, Brian D. Carlstrom, John D. Davis, Ben Hertzberg, Manohar K. Prabhu, Honggo Wijaya, Christos Kozyrakis, and Kunle Olukotun. Transactional memory coherence and consistency. In Proceedings of the 31st annual international symposium on Computer architecture, ISCA '04, pages 102--, Washington, DC, USA, 2004. IEEE Computer Society.

Digital Library

[27]

Maurice Herlihy and J. Eliot B. Moss. Transactional memory: architectural support for lock-free data structures. In Proceedings of the 20th annual international symposium on computer architecture, ISCA '93, pages 289--300, New York, NY, USA, 1993. ACM.

Digital Library

[28]

R. Hickey. The clojure programming language. In Proceedings of the 2008 symposium on Dynamic languages. ACM, 2008.

Digital Library

[29]

S.A.R. Jafri, M. Thottethodi, and TN Vijaykumar. Litetm: Reducing transactional state overhead. In High Performance Computer Architecture (HPCA), 2010 IEEE 16th International Symposium on. IEEE, 2010.

[30]

Hyungsoo Jung, Hyuck Han, Alan Fekete, Uwe Röhm, and Heon Young Yeom. Performance of serializable snapshot isolation on multicore servers. In DASFAA (2), pages 416--430. IEEE Computer Society, 2013.

[31]

Vivek Seshadri Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko Yixin Luo, Onur Mutlu, Phillip B Gibbons, Michael A Kozuch, and Todd C Mowry. Rowclone: Fast and efficient in-dram copy and initialization of bulk data. In Microarchitecture, 2013. MICRO-46. 46th Annual IEEE/ACM International Symposium on, 2013.

Digital Library

[32]

S. Kumar, M. Chu, C.J. Hughes, P. Kundu, and A. Nguyen. Hybrid transactional memory. In Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming. ACM, 2006.

Digital Library

[33]

Per-Åke Larson, Spyros Blanas, Cristian Diaconu, Craig Freedman, Jignesh M Patel, and Mike Zwilling. High-performance concurrency control mechanisms for main-memory databases. Proceedings of the VLDB Endowment, 5(4):298--309, 2011.

Digital Library

[34]

Viktor Leis, Alfons Kemper, and Thomas Neumann. Exploiting hardware transactional memory in main-memory databases. In Proc. of ICDE, 2014.

[35]

Kevin M. Lepak, Gordon B. Bell, and Mikko H. Lipasti. Silent stores and store value locality. IEEE Trans. Comput., pages 1174--1190, November 2001.

Digital Library

[36]

Y. Lin, B. Kemme, M. Pati\ no-Martínez, and R. Jiménez-Peris. Middleware based data replication providing snapshot isolation. In Proceedings of the 2005 ACM SIGMOD international conference on Management of data. ACM, 2005.

Digital Library

[37]

C.K. Luk, R. Cohn, R. Muth, H. Patil, A. Klauser, G. Lowney, S. Wallace, V.J. Reddi, and K. Hazelwood. Pin: building customized program analysis tools with dynamic instrumentation. In ACM SIGPLAN Notices. ACM, 2005.

Digital Library

[38]

V.J. Marathe, M.F. Spear, C. Heriot, A. Acharya, D. Eisenstat, W.N. Scherer III, and M.L. Scott. Lowering the overhead of nonblocking software transactional memory. In Workshop on Languages, Compilers, and Hardware Support for Transactional Computing (TRANSACT), 2006.

[39]

Timothy Merrifield and Jakob Eriksson. Conversion: multi-version concurrency control for main memory segments. In Proceedings of the 8th ACM European Conference on Computer Systems, pages 127--139. ACM, 2013.

Digital Library

[40]

C.C. Minh, J.W. Chung, C. Kozyrakis, and K. Olukotun. Stamp: Stanford transactional applications for multi-processing. In Workload Characterization, 2008. IISWC 2008. IEEE International Symposium on. IEEE, 2008.

[41]

K.E. Moore, J. Bobba, M.J. Moravan, M.D. Hill, and D.A. Wood. Logtm: Log-based transactional memory. In Proceedings of the 12th International Symposium on High-Performance Computer Architecture (HPCA-12). Austin: IEEE Computer Society, 2006.

[42]

M. Olszewski, J. Cutler, and J.G. Steffan. Judostm: A dynamic binary-rewriting approach to software transactional memory. In Parallel Architecture and Compilation Techniques, 2007. PACT 2007. 16th International Conference on. IEEE, 2007.

Digital Library

[43]

D.R.K. Ports and K. Grittner. Serializable snapshot isolation in postgresql. Proceedings of the VLDB Endowment, 2012.

Digital Library

[44]

Seth H Pugsley, Manu Awasthi, Niti Madan, Naveen Muralimanohar, and Rajeev Balasubramonian. Scalable and reliable communication for hardware transactional memory. In Proceedings of the 17th international conference on Parallel architectures and compilation techniques, pages 144--154. ACM, 2008.

Digital Library

[45]

Xuehai Qian, Wonsun Ahn, and Josep Torrellas. Scalablebulk: Scalable cache coherence for atomic blocks in a lazy environment. In Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, pages 447--458. IEEE Computer Society, 2010.

Digital Library

[46]

R. Rajwar and J.R. Goodman. Speculative lock elision: Enabling highly concurrent multithreaded execution. In Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, pages 294--305. IEEE Computer Society, 2001.

Digital Library

[47]

R. Rajwar, M. Herlihy, and K. Lai. Virtualizing transactional memory. In Computer Architecture, 2005. ISCA'05. Proceedings. 32nd International Symposium on. IEEE, 2005.

Digital Library

[48]

Ravi Rajwar and James R. Goodman. Transactional lock-free execution of lock-based programs. In Proceedings of the 10th international conference on Architectural support for programming languages and operating systems (ASPLOS). IEEE Computer Society, 2002.

Digital Library

[49]

Hany E Ramadan, Christopher J Rossbach, and Emmett Witchel. Dependence-aware transactional memory for increased concurrency. In Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture, pages 246--257. IEEE Computer Society, 2008.

Digital Library

[50]

T. Riegel, C. Fetzer, and P. Felber. Snapshot isolation for software transactional memory. In TRANSACT06, volume 298, 2006.

[51]

B. Saha, A.R. Adl-Tabatabai, and Q. Jacobson. Architectural support for software transactional memory. In Microarchitecture, 2006. MICRO-39. 39th Annual IEEE/ACM International Symposium on. IEEE, 2006.

Digital Library

[52]

Daniel Sanchez and Christos Kozyrakis. ZSim: Fast and Accurate Microarchitectural Simulation of Thousand-Core Systems. In Proceedings of the 40th annual International Symposium in Computer Architecture (ISCA-40), June 2013.

Digital Library

[53]

Nir Shavit and Dan Touitou. Software transactional memory. Distributed Computing, pages 99--116, 1997.

[54]

Tatiana Shpeisman, Ali-Reza Adl-Tabatabai, Robert Geva, Yang Ni, and Adam Welc. Towards transactional memory semantics for c

[55]

. In Proceedings of the twenty-first annual symposium on Parallelism in algorithms and architectures, SPAA '09, pages 49--58, New York, NY, USA, 2009. IEEE Computer Society, ACM.

[56]

Arrvindh Shriraman, Sandhya Dwarkadas, and Michael L Scott. Flexible decoupled transactional memory support. In ACM SIGARCH Computer Architecture News, pages 139--150. IEEE Computer Society, 2008.

Digital Library

[57]

S. Tomić, C. Perfumo, C. Kulkarni, A. Armejach, A. Cristal, O. Unsal, T. Harris, and M. Valero. Eazyhtm: eager-lazy hardware transactional memory. In Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, pages 145--155. ACM, 2009.

Digital Library

[58]

Mridha-Mohammad Waliullah and Per Stenstrom. Classification and elimination of conflicts in hardware transactional memory systems. In SBAC-PAD. IEEE Computer Society, 2011.

Digital Library

[59]

Zhichao Yan, Hong Jiang, Dan Feng, Lei Tian, and Yujuan Tan. Suv: A novel single-update version-management scheme for hardware transactional memory systems. In Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium, IPDPS '12, Washington, DC, USA, 2012. IEEE Computer Society.

Digital Library

[60]

Richard M. Yoo, Christopher J. Hughes, Konrad Lai, and Ravi Rajwar. Performance evaluation of intel® transactional synchronization extensions for high-performance computing. In Proceedings of SC13: International Conference for High Performance Computing, Networking, Storage and Analysis, SC '13, pages 19:1--19:11, New York, NY, USA, 2013. ACM.

Digital Library

Cited By

Cardoso DFoss LDu Bois A(2022)Exploring Opacity Software Transactional Memory in Haskell through Graph TransformationProceedings of the XXVI Brazilian Symposium on Programming Languages10.1145/3561320.3561325(15-23)Online publication date: 6-Oct-2022
https://dl.acm.org/doi/10.1145/3561320.3561325
Xu YYe CSolihin YShen XSalapura VZahran MChong FTang L(2022)FFCCDProceedings of the 49th Annual International Symposium on Computer Architecture10.1145/3470496.3527406(274-288)Online publication date: 18-Jun-2022
https://dl.acm.org/doi/10.1145/3470496.3527406
Titos-Gil RFernandez Pascual RRos AAcacio M(2021)DeTraS: Delaying Stores for Friendly-Fire Mitigation in Hardware Transactional MemoryIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2021.3085210(1-1)Online publication date: 2021
https://doi.org/10.1109/TPDS.2021.3085210
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Index Terms

SI-TM: reducing transactional memory abort rates through snapshot isolation
1. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory

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ASPLOS '14

Transactional memory represents an attractive conceptual model for programming concurrent applications. Unfortunately, high transaction abort rates can cause significant performance degradation. Conventional transactional memory realizations not only ...

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cover image ACM Conferences

ASPLOS '14: Proceedings of the 19th international conference on Architectural support for programming languages and operating systems

February 2014

780 pages

ISBN:9781450323055

DOI:10.1145/2541940

General Chairs:
Rajeev Balasubramonian
University of Utah
,
Al Davis
University of Utah
,
Program Chair:
Sarita Adve
University of Illinois at Urbana-Champ

ACM SIGARCH Computer Architecture News Volume 42, Issue 1
ASPLOS '14
March 2014
729 pages
ISSN:0163-5964
DOI:10.1145/2654822
Editor:
Doug DeGroot
acm dot org
Issue’s Table of Contents
ACM SIGPLAN Notices Volume 49, Issue 4
ASPLOS '14
April 2014
729 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/2644865
Editors:
Mark W. Bailey
Hamilton College, Clinton, NY
,
Rajeev Balasubramonian
University of Utah
,
Al Davis
University of Utah
,
Sarita Adve
University of Illinois at Urbana-Champ
Issue’s Table of Contents

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Published: 24 February 2014

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Cited By

Cardoso DFoss LDu Bois A(2022)Exploring Opacity Software Transactional Memory in Haskell through Graph TransformationProceedings of the XXVI Brazilian Symposium on Programming Languages10.1145/3561320.3561325(15-23)Online publication date: 6-Oct-2022
https://dl.acm.org/doi/10.1145/3561320.3561325
Xu YYe CSolihin YShen XSalapura VZahran MChong FTang L(2022)FFCCDProceedings of the 49th Annual International Symposium on Computer Architecture10.1145/3470496.3527406(274-288)Online publication date: 18-Jun-2022
https://dl.acm.org/doi/10.1145/3470496.3527406
Titos-Gil RFernandez Pascual RRos AAcacio M(2021)DeTraS: Delaying Stores for Friendly-Fire Mitigation in Hardware Transactional MemoryIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2021.3085210(1-1)Online publication date: 2021
https://doi.org/10.1109/TPDS.2021.3085210
Shimchenko MTitos-Gil RFernández-Pascual RAcacio MKaxiras SRos AJimborean A(2021)Analysing software prefetching opportunities in hardware transactional memoryThe Journal of Supercomputing10.1007/s11227-021-03897-zOnline publication date: 2-Jun-2021
https://doi.org/10.1007/s11227-021-03897-z
Attiya HFatourou PHans SKanellou E(2021)Staleness and Local Progress in Transactional MemoryNetworked Systems10.1007/978-3-030-67087-0_15(227-243)Online publication date: 14-Jan-2021
https://doi.org/10.1007/978-3-030-67087-0_15
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Baader FBorgwardt SKoopmann POzaki AThost V(2020)Metric Temporal Description Logics with Interval-Rigid NamesACM Transactions on Computational Logic10.1145/339944321:4(1-46)Online publication date: 11-Aug-2020
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Arora NYu JOh HStarner TAbowd G(2020)SATURNGetMobile: Mobile Computing and Communications10.1145/3379092.337910323:3(28-33)Online publication date: 10-Jan-2020
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