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EPEE: an efficient PCIe communication library with easy-host-integration property for FPGA accelerators (abstract only)

Published: 26 February 2014 Publication History

Abstract

The rapid growth in the resources and processing power of FPGA has made it more and more attractive as accelerator platforms. Due to its high performance, the PCIe bus is the preferred interconnection between the host computer and loosely-coupled FPGA accelerators. To fully utilize the high performance of PCIe, developers have to write significant amount of PCIe related code. In this paper, we present the design of EPEE, an efficient PCIe communication library that can integrate with hosts easily to alleviate developers from such burden. It is not trivial to make a PCIe communication library highly efficient and easy-host-integration simultaneously. We have identified several challenges in the work: 1) the conflict between efficiency and functionality; 2) the support for multi-clock domain interface; 3) the solution to DMA data out-of-order transfer; 4) the portability. Few existing systems have addressed all the challenges. EEPE has a highly efficient core library that is extensible. We provide a set of APIs abstracted at high levels to ease the learning curve of developers, and divide the hardware library into device dependent and independent layers for portability. We have implemented EEPE in various generations of Xilinx FPGAs with up to 12.7 Gbps half-duplex and 20.8 Gbps full-duplex data rates in PCIe Gen2X4 mode (79.4% and 64.0% of the theoretical maximum data rates respectively). EEPE has already been used in four different FPGA applications, and it can be integrated with high-level synthesis tools, in particular Vivado-HLS.

Cited By

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  • (2018)CR-GRTProceedings of the 21st ACM International Conference on Modeling, Analysis and Simulation of Wireless and Mobile Systems10.1145/3242102.3242114(333-341)Online publication date: 25-Oct-2018
  • (2018)Energy-Performance Considerations for Data Offloading to FPGA-Based Accelerators Over PCIeACM Transactions on Architecture and Code Optimization10.1145/318026315:1(1-24)Online publication date: 22-Mar-2018
  • (2017)The Tick Programmable Low-Latency SDR SystemProceedings of the 23rd Annual International Conference on Mobile Computing and Networking10.1145/3117811.3117834(101-113)Online publication date: 4-Oct-2017
  • Show More Cited By

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  1. EPEE: an efficient PCIe communication library with easy-host-integration property for FPGA accelerators (abstract only)

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    Published In

    cover image ACM Conferences
    FPGA '14: Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
    February 2014
    272 pages
    ISBN:9781450326711
    DOI:10.1145/2554688
    Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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    New York, NY, United States

    Publication History

    Published: 26 February 2014

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    Author Tags

    1. dma
    2. easy-host-integration
    3. efficient
    4. extensible
    5. fpga
    6. pcie

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    FPGA '14 Paper Acceptance Rate 30 of 110 submissions, 27%;
    Overall Acceptance Rate 125 of 627 submissions, 20%

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    Cited By

    View all
    • (2018)CR-GRTProceedings of the 21st ACM International Conference on Modeling, Analysis and Simulation of Wireless and Mobile Systems10.1145/3242102.3242114(333-341)Online publication date: 25-Oct-2018
    • (2018)Energy-Performance Considerations for Data Offloading to FPGA-Based Accelerators Over PCIeACM Transactions on Architecture and Code Optimization10.1145/318026315:1(1-24)Online publication date: 22-Mar-2018
    • (2017)The Tick Programmable Low-Latency SDR SystemProceedings of the 23rd Annual International Conference on Mobile Computing and Networking10.1145/3117811.3117834(101-113)Online publication date: 4-Oct-2017
    • (2014)GRTACM SIGARCH Computer Architecture News10.1145/2693714.269372442:4(51-56)Online publication date: 3-Dec-2014
    • (2014)An efficient and flexible host-FPGA PCIe communication library2014 24th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2014.6927459(1-6)Online publication date: Sep-2014

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