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Theoretical analysis of classic algorithms on highly-threaded many-core GPUs

Published: 06 February 2014 Publication History

Abstract

The Threaded many-core memory (TMM) model provides a framework to analyze the performance of algorithms on GPUs. Here, we investigate the effectiveness of the TMM model by analyzing algorithms for 3 classic problems -- suffix tree/array for string matching, fast Fourier transform, and merge sort -- under this model. Our findings indicate that the TMM model can explain and predict previously unexplained trends and artifacts in experimental data.

References

[1]
G. Encarnaijao, N. Sebastiao, and N. Roma. Advantages and GPU implementation of high-performance indexed DNA search based on suffix arrays. In Proc. of HPCS, 2011.
[2]
N. K. Govindaraju et al. High performance discrete Fourier transforms on graphics processors. In Proc. of SC, 2008.
[3]
L. Ma, K. Agrawal, and R. D. Chamberlain. A memory access model for highly-threaded many-core architectures. Future Generation Computer Systems, 30: 202--215, January 2014.
[4]
N. Satish et al. Designing efficient sorting algorithms for manycore GPUs. In Proc. of IPDPS, 2009.

Cited By

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  • (2018)Analysis of classic algorithms on highly-threaded many-core architecturesFuture Generation Computer Systems10.1016/j.future.2017.02.00782(528-543)Online publication date: May-2018
  • (2017)Two-Level Task Scheduling for Irregular Applications on GPU PlatformInternational Journal of Parallel Programming10.1007/s10766-015-0387-045:1(79-93)Online publication date: 1-Feb-2017
  • (2016)An Accurate GPU Performance Model for Effective Control Flow Divergence OptimizationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2015.250130335:7(1165-1178)Online publication date: 1-Jul-2016
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Published In

cover image ACM Conferences
PPoPP '14: Proceedings of the 19th ACM SIGPLAN symposium on Principles and practice of parallel programming
February 2014
412 pages
ISBN:9781450326568
DOI:10.1145/2555243
Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Publication History

Published: 06 February 2014

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  1. threaded many-core memory (TMM) model

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PPoPP '14 Paper Acceptance Rate 28 of 184 submissions, 15%;
Overall Acceptance Rate 230 of 1,014 submissions, 23%

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Cited By

View all
  • (2018)Analysis of classic algorithms on highly-threaded many-core architecturesFuture Generation Computer Systems10.1016/j.future.2017.02.00782(528-543)Online publication date: May-2018
  • (2017)Two-Level Task Scheduling for Irregular Applications on GPU PlatformInternational Journal of Parallel Programming10.1007/s10766-015-0387-045:1(79-93)Online publication date: 1-Feb-2017
  • (2016)An Accurate GPU Performance Model for Effective Control Flow Divergence OptimizationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2015.250130335:7(1165-1178)Online publication date: 1-Jul-2016
  • (2016)Rethinking Memory Management in Modern Operating System: Horizontal, Vertical or Random?IEEE Transactions on Computers10.1109/TC.2015.246281365:6(1921-1935)Online publication date: 1-Jun-2016
  • (2015)Task-DProceedings of the 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security, and 2015 IEEE 12th International Conf on Embedded Software and Systems10.1109/HPCC-CSS-ICESS.2015.299(1663-1668)Online publication date: 24-Aug-2015
  • (2014)Analysis of classic algorithms on GPUs2014 International Conference on High Performance Computing & Simulation (HPCS)10.1109/HPCSim.2014.6903670(65-73)Online publication date: Jul-2014
  • (2014)Performance modeling for highly-threaded many-core GPUs2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors10.1109/ASAP.2014.6868641(84-91)Online publication date: Jun-2014

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