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Optimal power switch design methodology for ultra dynamic voltage scaling with a limited number of power rails

Published: 20 May 2014 Publication History

Abstract

Many burst-mode applications require high performance for brief time periods between extended sections of low performance operation. Digital circuits supporting such burst-mode applications should work in both the near-threshold regime and the super-threshold regime for brief time periods. This work proposes the structure support of fine-grained ultra dynamic voltage scaling (UDVS) from the traditional strong-inversion region to the near-threshold region, with limitations on the number of power rails. The number, type, and size of the power switches are jointly optimized to minimize the overall energy consumption of the UDVS circuit block, meanwhile satisfying the target delay or frequency requirement at each DVS level. The proposed optimization framework properly accounts for the dynamic energy consumption as well as the leakage energy consumption through all the power switches during both the operation time and stand-by time of the circuit block. Experimental results on 22nm Predictive Technology Model demonstrate the effectiveness of the proposed optimization framework.

References

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  1. Optimal power switch design methodology for ultra dynamic voltage scaling with a limited number of power rails

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    cover image ACM Conferences
    GLSVLSI '14: Proceedings of the 24th edition of the great lakes symposium on VLSI
    May 2014
    376 pages
    ISBN:9781450328166
    DOI:10.1145/2591513
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 20 May 2014

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    Author Tags

    1. near-threshold
    2. power switch
    3. ultra dynamic voltage scaling (UDVS)

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    GLSVLSI '14 Paper Acceptance Rate 49 of 179 submissions, 27%;
    Overall Acceptance Rate 312 of 1,156 submissions, 27%

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