research-article

Accelerator-Rich Architectures: Opportunities and Progresses

Authors:

Mohammad Ali Ghodrat,

Beayna Grigorian,

Karthik Gururaj,

Glenn ReinmanAuthors Info & Claims

DAC '14: Proceedings of the 51st Annual Design Automation Conference

Pages 1 - 6

https://doi.org/10.1145/2593069.2596667

Published: 01 June 2014 Publication History

Abstract

To drastically improve energy efficiency, we believe future processors need to go beyond parallelization and provide architecture support for customization, enabling systems to adapt to different application domains. In particular, we believe future architectures will make extensive use of accelerators to significantly reduce energy consumption. Such architectures present many new challenges and opportunities, such as accelerator synthesis, scheduling, sharing, virtualization, memory hierarchy optimization, and efficient compilation and runtime support. With respect to these areas, we review the progress of our research in the Center for Domain-Specific Computing (supported by the NSF Expeditions-in-Computing Award), and discuss ongoing work and additional challenges.

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Cited By

Morais BJiang QSchirner G(2025)Enabling ILP-Based DSE for Multigranularity, Unified Domain Platforms With DmTSAR-ILPIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.344747344:3(911-922)Online publication date: Mar-2025
https://doi.org/10.1109/TCAD.2024.3447473
Chen KYang CSun YTseng CFayazi MHe XFeng SYue YMudge TDreslinski RKim HBlaauw D(2025)DAP: A 507-GMACs/J 256-Core Domain Adaptive Processor for Wireless Communication and Linear Algebra Kernels in 12-nm FINFETIEEE Journal of Solid-State Circuits10.1109/JSSC.2024.343875860:2(672-684)Online publication date: Feb-2025
https://doi.org/10.1109/JSSC.2024.3438758
Huang SYe YYan HShi L(2025)ARS-Flow 2.0: An enhanced design space exploration flow for accelerator-rich system based on active learningIntegration10.1016/j.vlsi.2024.102315101(102315)Online publication date: Mar-2025
https://doi.org/10.1016/j.vlsi.2024.102315
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Index Terms

Accelerator-Rich Architectures: Opportunities and Progresses
1. Computer systems organization
  1. Architectures
    1. Other architectures
      1. Heterogeneous (hybrid) systems

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cover image ACM Other conferences

DAC '14: Proceedings of the 51st Annual Design Automation Conference

June 2014

1249 pages

ISBN:9781450327305

DOI:10.1145/2593069

Copyright © 2014 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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EDAC: Electronic Design Automation Consortium
SIGBED: ACM Special Interest Group on Embedded Systems
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 June 2014

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DAC '14

DAC '14: The 51st Annual Design Automation Conference 2014

June 1 - 5, 2014

CA, San Francisco, USA

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Morais BJiang QSchirner G(2025)Enabling ILP-Based DSE for Multigranularity, Unified Domain Platforms With DmTSAR-ILPIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.344747344:3(911-922)Online publication date: Mar-2025
https://doi.org/10.1109/TCAD.2024.3447473
Chen KYang CSun YTseng CFayazi MHe XFeng SYue YMudge TDreslinski RKim HBlaauw D(2025)DAP: A 507-GMACs/J 256-Core Domain Adaptive Processor for Wireless Communication and Linear Algebra Kernels in 12-nm FINFETIEEE Journal of Solid-State Circuits10.1109/JSSC.2024.343875860:2(672-684)Online publication date: Feb-2025
https://doi.org/10.1109/JSSC.2024.3438758
Huang SYe YYan HShi L(2025)ARS-Flow 2.0: An enhanced design space exploration flow for accelerator-rich system based on active learningIntegration10.1016/j.vlsi.2024.102315101(102315)Online publication date: Mar-2025
https://doi.org/10.1016/j.vlsi.2024.102315
Chen KMason Nelson TKhadem AFayazi MSingapuram SDreslinski RTalati NKim HBlaauw D(2024)Canalis: A Throughput-Optimized Framework for Real-Time Stream Processing of Wireless CommunicationACM Transactions on Reconfigurable Technology and Systems10.1145/369588017:4(1-32)Online publication date: 22-Nov-2024
https://dl.acm.org/doi/10.1145/3695880
Rogers JSoliman TJahre M(2024)AIO: An Abstraction for Performance Analysis Across Diverse Accelerator Architectures2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA)10.1109/ISCA59077.2024.00043(487-500)Online publication date: 29-Jun-2024
https://doi.org/10.1109/ISCA59077.2024.00043
Huang SYe YYan HShi L(2024)ARS-Flow: A Design Space Exploration Flow for Accelerator-rich System based on Active Learning2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASP-DAC58780.2024.10473989(213-218)Online publication date: 22-Jan-2024
https://doi.org/10.1109/ASP-DAC58780.2024.10473989
Pudi DYang YStathis DKumar Prajapati SBoppu SHemani ACenkeramaddi L(2024)Application Level Synthesis: Creating Matrix-Matrix Multiplication Library: A Case StudyIEEE Access10.1109/ACCESS.2024.348417512(155885-155903)Online publication date: 2024
https://doi.org/10.1109/ACCESS.2024.3484175
Pudi DTiwari UBoppu SYang YHemani A(2024)Automating functional unit and register binding for synchoros CGRA platformDesign Automation for Embedded Systems10.1007/s10617-024-09286-y28:2(155-186)Online publication date: 1-Jun-2024
https://dl.acm.org/doi/10.1007/s10617-024-09286-y
Alam FLee HBhattacharjee AAwad A(2023)CryptoMMU: Enabling Scalable and Secure Access Control of Third-Party AcceleratorsProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3614311(32-48)Online publication date: 28-Oct-2023
https://dl.acm.org/doi/10.1145/3613424.3614311
Wang JZhang QRong HXu GKim MChandra SBlincoe KTonella P(2023)Leveraging Hardware Probes and Optimizations for Accelerating Fuzz Testing of Heterogeneous ApplicationsProceedings of the 31st ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering10.1145/3611643.3616318(1101-1113)Online publication date: 30-Nov-2023
https://dl.acm.org/doi/10.1145/3611643.3616318
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