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a-SAD: power efficient SAD calculator for real time H.264 video encoder using MSB-approximation technique

Published: 11 August 2014 Publication History

Abstract

We propose a power efficient SAD calculator, namely a-SAD. We use MSB-approximation where some highest-order MSB's are approximated to single MSB. Our theoretical analysis shows that this technique simultaneously improves performance and power of SAD circuit. We obtain optimal number of approximated MSB's from video experiments, which is the largest number not to affect video compression rate. In our simulations, our a-SAD circuit delivers higher performance compared to previous SAD circuits. We compare power dissipation under iso-performance scenario, where our a-SAD circuit shows 27% power saving compared to a previous design.

References

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Fore June. An introduction to Video compression in C/C++. CSIPP, 2010, ch.9, sec.9.4, pp. 132
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T.-C. Chen, S.-Y. Chien, Y.-W. Huang, C.-H. Tsai, C.-Y. Chen, T.-W. Chen and L.-G. Chen. Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder. IEEE Trans. Circ. Syst. Video Tech. vol.16, issue 6, pp.673--688, June.2006
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Iain E. Richardson The H.264 Advanced Video Compression Standard. 2nd edition, A John Wiley and Sons 2010.
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Vanne, J., Aho, E., Hamalainen, T.D. and Kuusilinna, K. A High-Performance Sum of Absolute Difference Implementation for Motion Estimation. IEEE Trans. Circ. Syst. Video Tech. vol. 16, issue 7, July.2006
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Kaul, H., Anders, M.A., Mathew, S.K., Hsu, S.K., Agarwal, A., Krishnamurthy, R.K. and Borkar, S. A 320 mV 56μW 411 GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65 nm CMOS. IEEE, Journal of Solid-state Cirt. Vol. 44, no. 1, January
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Swee Y.Y. and John V. McCanny. A VLSI Architecture for Variable Block Size Video Motion Estimation. IEEE Trans. Circ. Syst. -- II express briefs, vol. 51, no. 7, Juny 2004
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Seong S. Lee, Jeong-M. Kim and Soo-Ik Chae, New Motion Estimation Algorithm Using Adaptively Quantized Low Bit-Resolution Image and Its VLSI Architecture for MPEG2 Video Encoding. IEEE Trans. Circ. Syst. Video Tech. vol. 8, issue 6, Oct 1998
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JM ver.18.6 http://iphome.hhi.de/suehring/tml/

Cited By

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  • (2020)Enhancing Real-Time Motion Estimation through Approximate High-Level Synthesis2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI49217.2020.00016(30-35)Online publication date: Jul-2020
  • (2020)Throughput-Oriented Spatio-Temporal Optimization in Approximate High-Level Synthesis2020 IEEE 38th International Conference on Computer Design (ICCD)10.1109/ICCD50377.2020.00060(316-323)Online publication date: Oct-2020
  • (2016)FPGA implementation of template matching using binary Sum of Absolute Difference2016 6th International Conference on System Engineering and Technology (ICSET)10.1109/ICSEngT.2016.7849615(13-17)Online publication date: Oct-2016
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    cover image ACM Conferences
    ISLPED '14: Proceedings of the 2014 international symposium on Low power electronics and design
    August 2014
    398 pages
    ISBN:9781450329750
    DOI:10.1145/2627369
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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    Published: 11 August 2014

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    Author Tags

    1. approximate computing
    2. motion estimation
    3. msb-approximation
    4. sad circuit design

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    ISLPED '14 Paper Acceptance Rate 63 of 184 submissions, 34%;
    Overall Acceptance Rate 398 of 1,159 submissions, 34%

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    View all
    • (2020)Enhancing Real-Time Motion Estimation through Approximate High-Level Synthesis2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI49217.2020.00016(30-35)Online publication date: Jul-2020
    • (2020)Throughput-Oriented Spatio-Temporal Optimization in Approximate High-Level Synthesis2020 IEEE 38th International Conference on Computer Design (ICCD)10.1109/ICCD50377.2020.00060(316-323)Online publication date: Oct-2020
    • (2016)FPGA implementation of template matching using binary Sum of Absolute Difference2016 6th International Conference on System Engineering and Technology (ICSET)10.1109/ICSEngT.2016.7849615(13-17)Online publication date: Oct-2016
    • (2015)Low power block matching using pattern based pixel truncation2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)10.1109/MWSCAS.2015.7282075(1-4)Online publication date: Aug-2015

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