Kamalika Datta
Abstract
The problem of reversible logic synthesis has drawn the attention of many researchers over the last two decades with growing emphasis on low-power design. Among the various synthesis approaches that have been reported, the ones based on compact circuit representations like Binary Decision Diagrams (BDD) and Exclusive-or Sum-Of-Products (ESOP) are interesting in the sense that they can handle large circuits with more than 100 inputs. The drawback of these approaches, however, is that the generated netlists are sub-optimal, and there is lot of scope for optimizing them. One of the best methods in this regard is an approach, where the ESOP cubes are grouped into sublists based on sharing among more than one outputs. In the work reported in this article, in contrast, an approach based on clustering the ESOP cubes based on their similarity with respect to input variables is presented, along with a technique to map each of the clusters into reversible gate netlists. This approach results in a significant reduction in quantum cost of the final netlist, but requires one additional garbage line. Experimental results on a number of reversible circuit benchmarks have been presented in support of the claim and also demonstrate that the method is very fast.
- A. Barenco, H. H. Bennett, R. Cleve, D. P. DiVinchenzo, N. Margolus, P. Shor, T. Sleator, J. A. Smolin, and H. Weinfurter. 1995. Elementary gates for quantum computation. Phys. Rev. A: Atom. Molecular Optic. Phys. 52, 5 (1995), 3457--3467.Google Scholar
Cross Ref
- C. H. Bennett. 1973. Logical reversibility of computation. J. IBM Res. Develop. 17 (1973), 525--532. Google ScholarDigital Library
- A. Bèrut, A. Arakelyan, A. Petrosyan, S. Ciliberto, R. Dillenschneider, and E. Lutz. 2012. Experimental verification of Landauer's principle linking information and thermodynamics. Nature 483, 3 (2012), 187--189.Google ScholarCross Ref
- K. Datta, G. Rathi, I. Sengupta, and H. Rahaman. 2012. Synthesis of reversible circuits using heuristic search method. In Proceedings of the 25th International Conference on VLSI Design. 328--333. Google ScholarDigital Library
- K. Datta, I. Sengupta, and H. Rahaman. 2013. Particle swarm optimization based reversible circuit synthesis using mixed control Toffoli gates. J. Low Power Electron. 9, 3 (2013), 363--372.Google ScholarCross Ref
- R. Drechsler, A. Finder, and R. Wille. 2011. Improving ESOP-based synthesis of reversible logic using evolutionary algorithms. In Proceedings of the International Conference on Applications of Evolutionary Computation (Part II). 151--161. Google ScholarDigital Library
- K. Fazel, M. A. Thornton, and J. E. Rice. 2007. ESOP-based Toffoli gate cascade generation. In Proceedings of the IEEE Pacific Rim Conference on Communications, Computers and Signal Processing. 206--209.Google Scholar
- R. Feynman. 1985. Quantum mechanical computers. Optic News 11 (1985), 11--20.Google ScholarCross Ref
- E. Fredkin and T. Toffoli. 1982. Conservative logic. Int. J. Theor. Phys. 21 (1982), 219--253.Google ScholarCross Ref
- D. Grosse, R. Wille, G. W. Dueck, and R. Drechsler. 2009. Exact multiple control Toffoli network synthesis with SAT techniques. IEEE Trans. CAD Integr. Circuits Syst. 28, 5 (May 2009), 703--715. Google ScholarDigital Library
- P. Gupta, A. Agrawal, and N. K. Jha. 2006. An algorithm for synthesis of reversible logic circuits. IEEE Trans. CAD Integr. Circuits Syst. 25, 11 (2006), 2317--2329. Google ScholarDigital Library
- W. N. N. Hung, X. Song, G. Yang, J. Yang, and M. Perkowski. 2006. Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis. IEEE Trans. CAD Integr. Circuits Syst. 25, 9 (2006), 1652--1663. Google ScholarDigital Library
- R. Landauer. 1961. Irreversibility and heat generation in computing process. J. IBM Res. Develop. 5 (1961), 183--191. Google ScholarDigital Library
- D. Maslov and G. W. Dueck. 2006. Level compaction in quantum circuits. In Proceedings of the IEEE Congress on Evolutionary Computation. 2405--2409.Google Scholar
- D. M. Miller, D. Maslov, and G. W. Dueck. 2003. A transformation based algorithm for reversible logic synthesis. In Proceedings of the Design Automation Conference. 318--323. Google ScholarDigital Library
- D. M. Miller and Z. Sasanian. 2012. Recent developments on mapping reversible circuits to quantum gate libraries. In Proceedings of the 3rd International Symposium on Electronic System Design (ISED). Google ScholarDigital Library
- D. M. Miller, R. Wille, and R. Drechsler. 2010. Reducing reversible circuit cost by adding lines. In Proceedings of the 40th International Symposium on Multi-Valued Logic. 217--222. Google ScholarDigital Library
- A. Mishchenko and M. Perkowski. 2001. Fast heuristic minimization of exclusive-sums-of-products. In Proceedings of the 6th Reed-Muller Workshop. 242--250.Google Scholar
- G. E. Moore. 1965. Cramming more components onto integrated circuits. J. Electron. 38, 8 (1965), 183--191.Google Scholar
- N. Nayeem and J. E. Rice. 2011. A shared-cube approach to ESOP-based synthesis of reversible logic. Facta Universitatis of NiÊ, Elec. Energ. 24, 3 (2011), 385--402.Google Scholar
- M. Nielsen and I. Chuang. 2000. Quantum Computation and Quantum Information. Cambridge University Press. Google ScholarDigital Library
- J. M. Rabaey. 2009. Low Power Design Essentials. Series on Integrated Circuits and Systems, Springer, New York. Google ScholarDigital Library
- J. E. Rice, K. B. Fazel, M. A. Thornton, and K. B. Kent. 2009. Toffoli gate cascade generation using ESOP minimization and QMDD-based swapping. In Proceedings of the 14th Reed-Muller Workshop. 63--72.Google Scholar
- J. E. Rice and N. Nayeem. 2011. Ordering techniques for ESOP-based Toffoli cascade generation. In Proceedings of the IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM). 274--279.Google Scholar
- J. E. Rice and V. Suen. 2010. Using autocorrelation coefficient-based cost functions in ESOP-based Toffoli gate cascade generation. In Proceedings of the 23rd Canadian Conference on Electrical and Computer Engineering (CCECE). 1--6.Google Scholar
- K. Roy and S. C. Prasad. 2000. Low-Power CMOS VLSI Design. Wiley Interscience.Google Scholar
- Y. Sanaee and G. W. Dueck. 2009. Generating Toffoli networks from ESOP expressions. In Proceedings of the IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM). 715--719.Google Scholar
- Y. Sanaee and G. W. Dueck. 2010. ESOP-based Toffoli network generation with transformations. In Proceedings of the 40th International Symposium on Multiple-Valued Logic. 276--281. Google ScholarDigital Library
- M. Soeken, S. Frehse, R. Wille, and R. Drechsler. 2012. RevKit: An open source toolkit for the design of reversible circuits. In Proceedings of the 3rd International Workshop on Reversible Computation. Lecture Notes in Computer Science, vol. 7185, Springer-Verlag, Berlin, 64--76. Google ScholarDigital Library
- M. Thomson and R. Gluck. 2008. Optimized reversible binary-coded decimal adders. J. Syst. Architect. 54 (2008), 697--706. Google ScholarDigital Library
- T. Toffoli. 1980. Reversible computing. In Automata, Languages and Programming. Lecture Notes in Computer Science, vol. 85, Springer, Berlin, 632--644. Google ScholarDigital Library
- R. Wille and R. Drechsler. 2009. BDD-based synthesis of reversible logic for large functions. In Proceedings of the Design Automation Conference. 270--275. Google ScholarDigital Library
- R. Wille, D. Grosse, L. Teuber, G. W. Dueck, and R. Drechsler. 2008. RevLib: An online resource for reversible functions and reversible circuits. In Proceedings of the International Symposium on Multi-Valued Logic. 220--225. Google ScholarDigital Library
- R. Wille, M. Soeken, N. Przigoda, and R. Drechsler. 2012. Exact synthesis of Toffoli gate circuits with negative control lines. In Proceedings of the International Symposium on Multi-Valued Logic. 69--74. Google ScholarDigital Library
Index Terms
- An Improved Reversible Circuit Synthesis Approach using Clustering of ESOP Cubes
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