skip to main content
10.1145/2656045.2656049acmconferencesArticle/Chapter ViewAbstractPublication PagesesweekConference Proceedingsconference-collections
research-article

Building high-performance smartphones via non-volatile memory: the swap approach

Published:12 October 2014Publication History

ABSTRACT

Smartphones are getting increasingly high-performance with advances in mobile processors and larger main memories to support feature-rich applications. However, the storage subsystem has always been a prohibitive factor that slows down the pace of reaching even higher performance while maintaining good user experience. Despite today's smartphones are equipped with larger-than-ever main memories, they consume more energy and still run out of memory. But the slow NAND flash based storage vetoes the possibility of swapping---an important technique to extend main memory---and leaves a system that constantly terminates user applications under memory pressure.

In this paper, we revisit swapping for smartphones with fast, byte-addressable, non-volatile memory (NVM) technologies. Instead of using flash, we build the swap area with NVM, to allow high performance without sacrificing user experience. Based on NVM's high performance and byte-addressability, we show that a copy-on-write swap-in scheme can achieve even better performance by avoiding unnecessary memory copy operations. To avoid fast worn-out of certain NVMs, we also propose Heap-Wear, a wear leveling algorithm that more evenly distributes writes in NVM. Evaluation results based on the Google Nexus 5 smartphone show that our solution can effectively enhance smartphone performance and give better wear-leveling of NVM.

References

  1. C.-H. Chen, P.-C. Hsiu, T.-W. Kuo, C.-L. Yang, and C.-Y. M. Wang. Age-based PCM wear leveling with nearly zero search cost. In Proceedings of DAC, pages 453--458, 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. S. Cho and H. Lee. Flip-N-Write: A simple deterministic technique to improve PRAM write performance, energy and endurance. In Proceedings of MICRO, pages 347--357, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. J. Condit, E. B. Nightingale, C. Frost, E. Ipek, D. Burger, B. Lee, and D. Coetzee. Better I/O through byte-addressable, persistent memory. In Proceedings of SOSP, pages 133--146, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. S. Eilert, M. Leinwander, and G. Crisenza. Phase change memory: A new memory enables new memory usage models. In Proceedings of IMW, pages 1--2, 2009.Google ScholarGoogle ScholarCross RefCross Ref
  5. C. Fu, M. Zhao, C. J. Xue, and A. Orailoglu. Sleep-aware variable partitioning for energy-efficient hybrid PRAM and DRAM main memory. In Proceedings of ISLPED, pages 75--80, 2014. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. Google. Running android with low RAM. Android Developers Documentation, 2014.Google ScholarGoogle Scholar
  7. M. Hosomi, H. Yamagishi, T. Yamamoto, K. Bessho, Y. Higo, K. Yamane, H. Yamada, M. Shoji, H. Hachino, C. Fukumoto, H. Nagao, and H. Kano. A novel nonvolatile memory with spin torque transfer magnetization switching: spin-RAM. In Proceedings of IEDM, pages 459--462, 2005.Google ScholarGoogle ScholarCross RefCross Ref
  8. Hynix. eMMC flash storage using 41nm technology. Hynix Newsletter, 2009.Google ScholarGoogle Scholar
  9. S. Jeong, K. Lee, S. Lee, S. Son, and Y. Won. I/O stack optimization for smartphones. In Proceedings of USENIX ATC, pages 309--320, 2013. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. L. Jiang, B. Zhao, Y. Zhang, J. Yang, and B. Childers. Improving write operations in MLC phase change memory. In Proceedings of HPCA, pages 1--10, 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. A. Jog, A. Mishra, C. Xu, Y. Xie, V. Narayanan, R. Iyer, and C. Das. Cache revive: Architecting volatile STT-RAM caches for enhanced performance in cmps. In Proceedings of DAC, pages 243--252, 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. D. Jung, J. soo Kim, S. yeong Park, J. uk Kang, and J. Lee. FASS: A flash-aware swap system. In Proceedings of IWSSPS, 2005.Google ScholarGoogle Scholar
  13. H. Kim, N. Agrawal, and C. Ungureanu. Revisiting storage for smartphones. ACM Transactions on Storage, 8(4):1--25, 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. H. Kim and D. Shin. Optimizing storage performance of android smartphone. In Proceedings of ICUIMC, pages 1--7, 2013. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. B. C. Lee, E. Ipek, O. Mutlu, and D. Burger. Architecting phase change memory as a scalable DRAM alternative. In Proceedings of ISCA, pages 2--13, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. D. Liu, T. Wang, Y. Wang, Z. Qin, and Z. Shao. PCM-FTL: A write-activity-aware NAND flash memory management scheme for PCM-based embedded systems. In Proceedings of RTSS, pages 357--366, 2011. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. W. Mauerer. Professional Linux Kernel Architecture. Wrox Press Ltd., Birmingham, UK, 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. K. Qiu, Q. Li, and C. J. Xue. Write mode aware loop tiling for high performance low power volatile PCM. In Proceedings of DAC, pages 1--6, 2014. Google ScholarGoogle ScholarDigital LibraryDigital Library
  19. M. K. Qureshi, J. Karidis, M. Franceschini, V. Srinivasan, L. Lastras, and B. Abali. Enhancing lifetime and security of PCM-based main memory with Start-gap wear leveling. In Proceedings of MICRO, pages 14--23, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  20. H. Saadeldeen, D. Franklin, G. Long, C. Hill, A. Browne, D. Strukov, T. Sherwood, and F. T. Chong. Memristors for neural branch prediction: A case study in strict latency and write endurance challenges. In Proceedings of CF, pages 1--10, 2013. Google ScholarGoogle ScholarDigital LibraryDigital Library
  21. M. Saxena and M. M. Swift. FlashVM: Revisiting the virtual memory hierarchy. In Proceedings of HotOS, pages 13--13, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  22. Z. Shao, Y. Liu, Y. Chen, and T. Li. Utilizing PCM for energy optimization in embedded systems. In Proceedings of ISVLSI, pages 398--403, 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  23. D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams. The missing memristor found. Nature, 453(7191):80--83, 2008.Google ScholarGoogle ScholarCross RefCross Ref
  24. H. Volos, A. J. Tack, and M. M. Swift. Mnemosyne: Lightweight persistent memory. In Proceedings of ASPLOS, pages 91--104, 2011. Google ScholarGoogle ScholarDigital LibraryDigital Library
  25. T. Wang, D. Liu, Y. Wang, and Z. Shao. FTL2: a hybrid flash translation layer with logging for write reduction in flash memory. In Proceedings of ACM LCTES, pages 91--100, 2013. Google ScholarGoogle ScholarDigital LibraryDigital Library
  26. H. S. P. Wong, S. Raoux, S. Kim, J. Liang, J. P. Reifenberg, B. Rajendran, M. Asheghi, and K. E. Goodson. Phase change memory. Proceedings of the IEEE, 98(12):2201--2227, 2010.Google ScholarGoogle ScholarCross RefCross Ref
  27. C. J. Xue, Y. Zhang, Y. Chen, G. Sun, J. J. Yang, and H. Li. Emerging non-volatile memories: Opportunities and challenges. In Proceedings of CODES+ISSS, pages 325--334, 2011. Google ScholarGoogle ScholarDigital LibraryDigital Library
  28. B.-D. Yang, J.-E. Lee, J.-S. Kim, J. Cho, S.-Y. Lee, and B.-G. Yu. A low power phase-change random access memory using a data-comparison write scheme. In Proceedings of ISCAS, pages 3014--3017, 2007.Google ScholarGoogle ScholarCross RefCross Ref
  29. K. Zhong, X. Zhu, T. Wang, D. Zhang, X. Luo, D. Liu, W. Liu, and E. H.-M. Sha. DR. Swap: Energy-efficient paging for smarthpones. In Proceedings of ISLPED, pages 81--86, 2014. Google ScholarGoogle ScholarDigital LibraryDigital Library
  30. P. Zhou, B. Zhao, J. Yang, and Y. Zhang. A durable and energy efficient main memory using phase change memory technology. In Proceedings of ISCA, pages 14--23, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. Building high-performance smartphones via non-volatile memory: the swap approach

          Recommendations

          Comments

          Login options

          Check if you have access through your login credentials or your institution to get full access on this article.

          Sign in
          • Published in

            cover image ACM Conferences
            EMSOFT '14: Proceedings of the 14th International Conference on Embedded Software
            October 2014
            301 pages
            ISBN:9781450330527
            DOI:10.1145/2656045

            Copyright © 2014 ACM

            Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

            Publisher

            Association for Computing Machinery

            New York, NY, United States

            Publication History

            • Published: 12 October 2014

            Permissions

            Request permissions about this article.

            Request Permissions

            Check for updates

            Qualifiers

            • research-article

            Acceptance Rates

            Overall Acceptance Rate60of203submissions,30%

            Upcoming Conference

            ESWEEK '24
            Twentieth Embedded Systems Week
            September 29 - October 4, 2024
            Raleigh , NC , USA

          PDF Format

          View or Download as a PDF file.

          PDF

          eReader

          View online with eReader.

          eReader