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Verification of Hardware Implementations through Correctness of their Recursive Definitions in PVS

Published: 01 September 2014 Publication History

Abstract

An approach is introduced to formally verify the logical correctness of reconfigurable hardware implementations of algebraic operators. Since Hardware Description Languages describe circuits/systems in an imperative style and formalization tools use recursive specification languages, the kernel of our approach is based on a conservative translation from imperative into recursive implementations. The main challenge of this approach is that proofs follow an inductive schema that is based on guaranteeing pre and post-conditions and preservation of invariants during all steps of the recursive execution such as in the Floyd-Hoare's logical approach for verification of imperative procedures. The applicability of the methodology is illustrated in the Proto-type Verification System (PVS) by proving the logical correctness of an FPGA implementation of the Gauss-Jordan matrix inversion algorithm (GJ). Correctness of this FPGA implementation is based on proving its functional equivalence (FEq) with an algebraic imperative definition of GJ. The approach allows formal verification of fragments of the implementations either simultaneously or afterwards the design process has been finished, avoiding in this way hardware development delays.

References

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cover image ACM Conferences
SBCCI '14: Proceedings of the 27th Symposium on Integrated Circuits and Systems Design
September 2014
286 pages
ISBN:9781450331562
DOI:10.1145/2660540
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 September 2014

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Author Tags

  1. Formal Verification
  2. Hardware Verification
  3. Recursive Definitions

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SBCCI '14 Paper Acceptance Rate 40 of 130 submissions, 31%;
Overall Acceptance Rate 133 of 347 submissions, 38%

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