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Robust Design Space Modeling

Published: 02 March 2015 Publication History

Abstract

Architectural design spaces of microprocessors are often exponentially large with respect to the pending processor parameters. To avoid simulating all configurations in the design space, machine learning and statistical techniques have been utilized to build regression models for characterizing the relationship between architectural configurations and responses (e.g., performance or power consumption). However, this article shows that the accuracy variability of many learning techniques over different design spaces and benchmarks can be significant enough to mislead the decision-making. This clearly indicates a high risk of applying techniques that work well on previous modeling tasks (each involving a design space, benchmark, and design objective) to a new task, due to which the powerful tools might be impractical.
Inspired by ensemble learning in the machine learning domain, we propose a robust framework called ELSE to reduce the accuracy variability of design space modeling. Rather than employing a single learning technique as in previous investigations, ELSE employs distinct learning techniques to build multiple base regression models for each modeling task. This is not a trivial combination of different techniques (e.g., always trusting the regression model with the smallest error). Instead, ELSE carefully maintains the diversity of base regression models and constructs a metamodel from the base models that can provide accurate predictions even when the base models are far from accurate. Consequently, we are able to reduce the number of cases in which the final prediction errors are unacceptably large. Experimental results validate the robustness of ELSE: compared with the widely used artificial neural network over 52 distinct modeling tasks, ELSE reduces the accuracy variability by about 62%. Moreover, ELSE reduces the average prediction error by 27% and 85% for the investigated MIPS and POWER design spaces, respectively.

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Cited By

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  • (2023)A Transfer Learning Framework for High-Accurate Cross-Workload Design Space Exploration of CPU2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323840(1-9)Online publication date: 28-Oct-2023
  • (2023)Graph Representation Learning for Microarchitecture Design Space Exploration2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247687(1-6)Online publication date: 9-Jul-2023
  • (2018)Processor Design Space Exploration via Statistical Sampling and Semi-Supervised Ensemble LearningIEEE Access10.1109/ACCESS.2018.28310796(25495-25505)Online publication date: 2018
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Published In

cover image ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems  Volume 20, Issue 2
February 2015
404 pages
ISSN:1084-4309
EISSN:1557-7309
DOI:10.1145/2742143
  • Editor:
  • Naehyuck Chang
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 02 March 2015
Accepted: 01 September 2014
Revised: 01 August 2014
Received: 01 January 2014
Published in TODAES Volume 20, Issue 2

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Author Tags

  1. Architectural simulation
  2. design space modeling
  3. ensemble learning

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  • Research-article
  • Research
  • Refereed

Funding Sources

  • the Internatioanal Collaboration Key Program of the CAS
  • the Strategic Priority Research Program of the CAS
  • NSF of China
  • the 863 Program of China
  • the DARPA PERFECT program
  • the 10000 Talent Program

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Cited By

View all
  • (2023)A Transfer Learning Framework for High-Accurate Cross-Workload Design Space Exploration of CPU2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323840(1-9)Online publication date: 28-Oct-2023
  • (2023)Graph Representation Learning for Microarchitecture Design Space Exploration2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247687(1-6)Online publication date: 9-Jul-2023
  • (2018)Processor Design Space Exploration via Statistical Sampling and Semi-Supervised Ensemble LearningIEEE Access10.1109/ACCESS.2018.28310796(25495-25505)Online publication date: 2018
  • (2017)Cross-program design space exploration by ensemble transfer learningProceedings of the 36th International Conference on Computer-Aided Design10.5555/3199700.3199727(201-208)Online publication date: 13-Nov-2017
  • (2017)Is Correlation Ranking Really Reliable for the Performance Counter Selection Conducted for Power Estimation?Journal of Circuits, Systems and Computers10.1142/S021812661750173026:11(1750173)Online publication date: Nov-2017
  • (2017)Cross-program design space exploration by ensemble transfer learning2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2017.8203779(201-208)Online publication date: 13-Nov-2017
  • (2016)Efficient design space exploration by knowledge transferProceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis10.1145/2968456.2968457(1-10)Online publication date: 1-Oct-2016
  • (2016)Efficient design space exploration via statistical sampling and AdaBoost learningProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2898012(1-6)Online publication date: 5-Jun-2016

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