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A Tool for Analog/RF BIST Evaluation Using Statistical Models of Circuit Parameters

Published: 02 March 2015 Publication History

Abstract

Testing analog integrated circuits is expensive in terms of both test equipment and time. To reduce the cost, Design-For-Test techniques (DFT) such as Built-In Self-Test (BIST) have been developed. For a given Circuit Under Test (CUT), the choice of a suitable technique should be made at the design stage as a result of the analysis of test metrics such as test escapes and yield loss. However, it is very hard to carry out this estimation for analog/RF circuits by using fault simulation techniques. Instead, the estimation of parametric test metrics is made possible by Monte Carlo circuit-level simulations and the construction of statistical models. These models represent the output parameter space of the CUT in which the test metrics are defined. In addition, models of the input parameter space may be required to accelerate the simulations and obtain higher confidence in the DFT choices. In this work, we describe a methodological flow for the selection of most adequate statistical models and several techniques that can be used for obtaining these models. Some of these techniques have been integrated into a Computer-Aided Test (CAT) tool for the automation of the process of test metrics estimation. This estimation is illustrated for the case of a BIST solution for CMOS imager pixels that requires the use of advanced statistical modeling techniques.

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  • (2023)Influence of PVT Variation and Threshold Selection on OBT and OBIST Fault Detection in RFCMOS AmplifiersIEEE Open Journal of Circuits and Systems10.1109/OJCAS.2022.32326384(70-84)Online publication date: 2023
  • (2020)Estimation of Analog/RF Parametric Test Metrics Based on a Multivariate Extreme Value ModelIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.290792339:5(966-976)Online publication date: May-2020
  • (2019)Efficient Production Binning Using Octree Tessellation in the Alternate Measurements SpaceIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2015.250130935:8(1386-1395)Online publication date: 4-Jan-2019
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      cover image ACM Transactions on Design Automation of Electronic Systems
      ACM Transactions on Design Automation of Electronic Systems  Volume 20, Issue 2
      February 2015
      404 pages
      ISSN:1084-4309
      EISSN:1557-7309
      DOI:10.1145/2742143
      • Editor:
      • Naehyuck Chang
      Issue’s Table of Contents
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 02 March 2015
      Accepted: 01 November 2014
      Revised: 01 September 2014
      Received: 01 August 2013
      Published in TODAES Volume 20, Issue 2

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      Author Tags

      1. BIST evaluation
      2. analog/RF test
      3. computer-aided test
      4. copula theory
      5. statistical modeling
      6. test metrics estimation

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      Cited By

      View all
      • (2023)Influence of PVT Variation and Threshold Selection on OBT and OBIST Fault Detection in RFCMOS AmplifiersIEEE Open Journal of Circuits and Systems10.1109/OJCAS.2022.32326384(70-84)Online publication date: 2023
      • (2020)Estimation of Analog/RF Parametric Test Metrics Based on a Multivariate Extreme Value ModelIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.290792339:5(966-976)Online publication date: May-2020
      • (2019)Efficient Production Binning Using Octree Tessellation in the Alternate Measurements SpaceIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2015.250130935:8(1386-1395)Online publication date: 4-Jan-2019
      • (2018)A Classification Approach for an Accurate Analog/RF BIST Evaluation Based on the Process ParametersJournal of Electronic Testing: Theory and Applications10.1007/s10836-018-5730-034:3(321-335)Online publication date: 1-Jun-2018
      • (2015)Analog circuits testing using digitally coded indirect measurements2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)10.1109/DTIS.2015.7127357(1-6)Online publication date: Apr-2015

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