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Scalable and Dynamic Global Power Management for Multicore Chips

Published: 19 January 2015 Publication History

Abstract

The design for continuous computer performance is increasingly becoming limited by the exponential increase in the power consumption. In order to improve the energy efficiency of multicore chips, we propose a novel global power management technique. The goal of the technique is to deliver the maximum performance at a fixed power budget, without significant overhead. To tackle the exponential complexity of the power management for multiple cores, we apply a Reinforcement Learning technique, Q-learning, at the core level and then use a chip-level intelligent controller to optimize the power distribution among all cores. The power assignment adapts dynamically at runtime depending on the needs of the applications. The technique was evaluated using the PARSEC benchmark suite on a full system simulator. The experimental results show, in average, that with the proposed technique the overall performance is increased by 39% for a fixed power budget while the EDP is improved by 28%, compared to the non-DVFS baseline implementation.

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Cited By

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  • (2023)A Survey of Machine Learning for Network-on-ChipsJournal of Parallel and Distributed Computing10.1016/j.jpdc.2023.104778(104778)Online publication date: Nov-2023
  • (2020)Meeting Power Constraints While Mitigating Contention on Clustered Multiprocessor SystemIEEE Embedded Systems Letters10.1109/LES.2019.295699012:3(99-102)Online publication date: Sep-2020
  • (2018)Event-Based Power/Performance-Aware Thermal Management for High-Density MicroprocessorsIEEE Transactions on Control Systems Technology10.1109/TCST.2017.267584126:2(535-550)Online publication date: Mar-2018
  • Show More Cited By

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cover image ACM Other conferences
PARMA-DITAM '15: Proceedings of the 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures
January 2015
43 pages
ISBN:9781450333436
DOI:10.1145/2701310
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 19 January 2015

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Author Tags

  1. DVFS
  2. Global
  3. Machine Learning
  4. Multicores
  5. Scalability

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PARMA-DITAM '15

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Overall Acceptance Rate 11 of 24 submissions, 46%

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Cited By

View all
  • (2023)A Survey of Machine Learning for Network-on-ChipsJournal of Parallel and Distributed Computing10.1016/j.jpdc.2023.104778(104778)Online publication date: Nov-2023
  • (2020)Meeting Power Constraints While Mitigating Contention on Clustered Multiprocessor SystemIEEE Embedded Systems Letters10.1109/LES.2019.295699012:3(99-102)Online publication date: Sep-2020
  • (2018)Event-Based Power/Performance-Aware Thermal Management for High-Density MicroprocessorsIEEE Transactions on Control Systems Technology10.1109/TCST.2017.267584126:2(535-550)Online publication date: Mar-2018
  • (2018)Machine Learning-Based Energy Optimization for Parallel Program Execution on Multicore ChipsArabian Journal for Science and Engineering10.1007/s13369-018-3079-4Online publication date: 29-Jan-2018
  • (2018)Performance-Energy Trade-off in CMPs with Per-Core DVFSArchitecture of Computing Systems – ARCS 201810.1007/978-3-319-77610-1_17(225-238)Online publication date: 8-Mar-2018
  • (2017)Modular reinforcement learning for self-adaptive energy efficiency optimization in multicore system2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2017.7858403(684-689)Online publication date: Jan-2017
  • (2016)Beyond von Neumann: Brain-computer structural metaphor2016 Third International Conference on Electrical, Electronics, Computer Engineering and their Applications (EECEA)10.1109/EECEA.2016.7470764(46-51)Online publication date: Apr-2016

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