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Exploiting Evolutionary Computation in an Industrial Flow for the Development of Code-Optimized Microprocessor Test Programs

Authors:

Riccardo Cantoro,

Marco Gaudesi,

Ernesto Sanchez,

Giovanni SquilleroAuthors Info & Claims

GECCO Companion '15: Proceedings of the Companion Publication of the 2015 Annual Conference on Genetic and Evolutionary Computation

Pages 1465 - 1466

https://doi.org/10.1145/2739482.2764673

Published: 11 July 2015 Publication History

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GECCO Companion '15: Proceedings of the Companion Publication of the 2015 Annual Conference on Genetic and Evolutionary Computation

Exploiting Evolutionary Computation in an Industrial Flow for the Development of Code-Optimized Microprocessor Test Programs

Pages 1465 - 1466

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Abstract

It is well-known that faults affecting an electronic device may compromise its correct functionality, and industries have to check that their devices are fault-free before selling them. In case of a processor core, this task may be accomplished by running specially written "test" programs. In industrial embedded applications, however, shrinking such programs is strictly required. The hard problems of generating and code-optimizing test programs are tackled in this paper by exploiting an evolutionary approach.

References

[1]

S.M. Thatte and J. A. Abraham, Test Generation for Microprocessors, IEEE Trans. on Computers, vol. 29, n. 6, pp. 429--441, 1980.

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[2]

M. Psarakis, D. Gizopoulos, E. Sanchez and M. S. Reorda, Microprocessor Software-Based Self-Testing, IEEE DESIGN & TEST OF COMPUTERS, vol. 27, n. 3, pp. 4--19, 2010.

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[3]

E. Sanchez and G. Squillero, Evolutionary Techniques Applied to Hardware Optimization Problems: Test and Verification of Advanced Processors, in Studies on Computational Intelligence, Vol 66, Advances in Evolutionary Computing for System Design, V. P. a. D. S. Lakhmi C. Jain, Ed., Springer, 2007, pp. 83--106.

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[4]

E. Sanchez, M. S. Reorda, G. Squillero and W. Lindsay, Automatic Test Programs Generation Driven by Internal Performance Counters, in Microprocessor Test and Verification, 2004.

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[5]

E. Sanchez, M. Schillaci and G. Squillero, Enhanced Test Program Compaction Using Genetic Programming, IEEE Congress on Evolutionary Computation, 2006, pp-865--870.

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[6]

R. Cantoro, M. Gaudesi, E. Sanchez, P. Schiavone and G. Squillero, An Evolutionary Approach for Test Programs Compaction, Latin American Test Symposium, 2015.

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[7]

E. Sanchez, M. Schillaci, G. Squillero, Evolutionary Optimization: the μGP toolkit, Springer, 2011.

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[8]

http://opencores.org/project,minimips

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GECCO Companion '15: Proceedings of the Companion Publication of the 2015 Annual Conference on Genetic and Evolutionary Computation

July 2015

1568 pages

ISBN:9781450334884

DOI:10.1145/2739482

Editor:
Sara Silva
Universidade de Lisboa, Portugal
,
General Chair:
Anna I. Esparcia-Alcázar
Universitat Politècnica de València, Spain

Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Association for Computing Machinery

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Published: 11 July 2015

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GECCO '15: Genetic and Evolutionary Computation Conference

July 11 - 15, 2015

Madrid, Spain

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A Deterministic Methodology for Identifying Functionally Untestable Path-Delay Faults in Microprocessor Cores

Design for Testability of Software-Based Self-Test for Processors

Systematic software-based self-test for pipelined processors

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