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View all- Reiher JGreenstreet M(2020)Optimization and Comparison of Synchronizers2020 26th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)10.1109/ASYNC49171.2020.00012(28-35)Online publication date: May-2020
Synchronizers play an essential role in multiple clock domain systems-on-chip. The most common synchronizer consists of a series of pipelined flip-flops. Several factors influence the performance of synchronizers: circuit design, process technology, and ...
In this paper we present efficient Mesochronous and Plesiochronous interfaces targeting low-latency and low-overhead links. Our source-synchronous scheme can easily be integrated in traditional design flows, supports maximal throughput, has low latency ...
The effects of redundancy and masking on the reliability of synchronizer circuits in the presence of metastability are considered. It is shown that in the jitter model developed by L. Kleeman (1990), in which circuit noise effects are considered, ...
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