ABSTRACT
To maintain reliable operation, task allocation for many-core processors must consider the heat interaction of processor cores and network-on-chip routers in performing task assignment. Our approach employs reinforcement learning, machine learning algorithm that performs task allocation based on current core and router temperatures and a prediction of which assignment will minimize maximum temperature in the future. The algorithm updates prediction models after each allocation based on feedback regarding the accuracy of previous predictions. Our new algorithm is verified via detailed many-core simulation which includes on-chip routing. Our results show that the proposed technique is fast (scheduling performed in <1 ms) and can efficiently reduce peak temperature by up to 8°C in a 49-core processor (4.3°C on average) versus a competing task allocation approach for a series of SPLASH-2 benchmarks.
- A. K. Coskun, T. S. Rosing, and K. Whisnant, "Temperature aware task scheduling in MPSoCs," in Proc. DATE, Mar. 2007, pp. 1659--1664. Google ScholarDigital Library
- C. H. Yu, C.-L. Lung, Y.-L. Ho, R.-S. Hsu, D.-M. Kwai, and S.-C. Chang, "Thermal-aware on-line scheduler for 3-D many-core processor throughput optimization," IEEE TCAD, vol. 33, no. 5, May 2014.Google Scholar
- A. Coskun, T. Rosing, K. Whisnant, and K. Gross, "Static and dynamic temperature-aware scheduling for multiprocessor SoCs," IEEE TVLSI, vol. 16, no. 9, pp. 1127--1140, Sep. 2008. Google ScholarDigital Library
- I. Yeo and E. J. Kim, "Temperature-aware scheduler based on thermal behavior grouping in multicore systems," in Proc. DATE, May 2009, pp. 946--951. Google ScholarDigital Library
- V. Hanumaiah, S. Vrudhula, and K. Chatha, "Performance optimal online DVFS and task migration techniques for thermally constrained multi-core processors," IEEE TCAD, vol. 30, no. 11, pp. 1677--1690, Nov. 2011. Google ScholarDigital Library
- W. Hung et al., "Thermal-aware IP virtualization and placement for networks-on-chip architecture," in Proc ICCD, Oct. 2004, pp. 430--437. Google ScholarDigital Library
- Z. Qian and C.-Y. Tsui, "A thermal-aware application specific routing algorithm for network-on-chip design," in Proc. ASP-DAC, 2011. Google ScholarDigital Library
- Y. Ge and Q. Qiu, "Dynamic thermal management for multimedia applications using machine learning," in Proc. DAC, June 2011, pp. 95--100. Google ScholarDigital Library
- T. Ebi, D. Kramer, W. Karl, and J. Henkel, "Economic learning for thermal-aware power budgeting in many-core architectures," in Proc. CODES+ISSS, Oct 2011. Google ScholarDigital Library
- G.-Y. Pan, J.-Y. Jou, and B.-C. Lai, "Scalable power management using multilevel reinforcement learning for multiprocessors," ACM Trans. Des. Autom. Electron. Syst., vol. 19, no. 4, pp. 33:1--33:23, Aug. 2014. Google ScholarDigital Library
- H. Chen and etc., "Spatially-aware optimization of energy consumption in consolidated data center systems," in ASME 2011 Pac. Rim Tech. Conf. and Exhibition on Packaging and Integration of Elec. and Phot. Sys.Google Scholar
- A. G. Barto, Reinforcement learning: An introduction. MIT press, 1998.Google ScholarDigital Library
- E. Rotem et al., "Power management architecture of the 2nd generation Intel core microarchitecture, formerly codenamed Sandy Bridge," in Hot Chips, August 2011.Google Scholar
- L. Baird and A. W. Moore, "Gradient descent for general reinforcement learning," Adv. in Neural Information Proc. Sys., pp. 968--974, 1999. Google ScholarDigital Library
- L. Sheng et al., "McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures," in Proc. IEEE/ACM Micro, 2009. Google ScholarDigital Library
- C. Sun et al., "DSENT - a tool connecting emerging photonics with electronics for opto-electronic networks-on-chip modeling," in Proc. IEEE/ACM Int'l Symp. on NoC, 2012, pp. 201--210. Google ScholarDigital Library
- T. E. Carlson, W. Heirman, and L. Eeckhout, "Sniper: Exploring the level of abstraction for scalable and accurate parallel multi-core simulations," in Int'l Conf. for High Perf. Comput., Network., Stor. and Analysis, 2011. Google ScholarDigital Library
Index Terms
- Reinforcement Learning for Thermal-aware Many-core Task Allocation
Recommendations
Research on Task Allocation Strategy and Scheduling Algorithm of Multi-core Load Balance
CISIS '13: Proceedings of the 2013 Seventh International Conference on Complex, Intelligent, and Software Intensive SystemsBased on the research of multi-core load balancing's task scheduling and allocation, we proposed the static task graphs stratification algorithm, the static task group scheduling algorithm, and the minimum dynamic link algorithm, aiming at the ...
Throughput optimal task allocation under thermal constraints for multi-core processors
DAC '09: Proceedings of the 46th Annual Design Automation ConferenceIt is known that temperature gradients and thermal hotspots affect the reliability of microprocessors. Temperature is also an important constraint when maximizing the performance of processors. Although DVFS and DFS can be used to extract higher ...
A many-core accelerator design for on-chip deep reinforcement learning
ICCAD '20: Proceedings of the 39th International Conference on Computer-Aided DesignDeep Reinforcement Learning (DRL) is substantially resource-consuming, and it requires large-scale distributed computing-nodes to learn complicated tasks, like videogame and Go play. This work attempts to down-scale a distributed DRL system into a ...
Comments