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A cross-layer design exploration of charge-recycled power-delivery in many-layer 3d-IC

Published: 07 June 2015 Publication History

Abstract

3D-IC technology brings both the opportunities to continue the historical trend of integration-level scaling and the challenges to deliver power reliably and efficiently. Voltage-stacking (V-S), a charge-recycled power delivery scheme that connects the different layers' supply/ground nets into a series stack, provides a scalable solution to the 3D-IC power delivery wall. While prior work has extensively discussed the implementations of V-S at circuit-level, a cross-layer study that examines its system-level implications is missing. In this paper, we start with a circuit implementation of a charge-recycled voltage regulator and build an architecture-level model to study the costs and benefits of utilizing V-S in 3D-IC. Our study shows that by significantly improving the EM-lifetime of C4 and TSV array (e.g., up to 5x) while only marginally increasing the average-case voltage noise (e.g., 0.75% Vdd IR drop), V-S provides a scalable solution for many-layer 3D-IC's power delivery challenge.

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Cited By

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  • (2024)Voltage Stacking: A First-Order Modelization of an m × n Asynchronous Array for Chip and Architectural Design ExplorationJournal of Low Power Electronics and Applications10.3390/jlpea1403004414:3(44)Online publication date: 27-Aug-2024
  • (2024)PowerScout: Security-Oriented Power Delivery Network Modeling for Side-Channel Vulnerability AnalysisIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2023.325782612:2(532-545)Online publication date: Apr-2024
  • (2020)Voltage-Stacked Power Delivery Systems: Reliability, Efficiency, and Power ManagementIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.296960739:12(5142-5155)Online publication date: Dec-2020
  • Show More Cited By

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    cover image ACM Conferences
    DAC '15: Proceedings of the 52nd Annual Design Automation Conference
    June 2015
    1204 pages
    ISBN:9781450335201
    DOI:10.1145/2744769
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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    Published: 07 June 2015

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    Author Tags

    1. 3d stacking
    2. power distribution network
    3. voltage noise

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    DAC '15: The 52nd Annual Design Automation Conference 2015
    June 7 - 11, 2015
    California, San Francisco

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    Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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    Cited By

    View all
    • (2024)Voltage Stacking: A First-Order Modelization of an m × n Asynchronous Array for Chip and Architectural Design ExplorationJournal of Low Power Electronics and Applications10.3390/jlpea1403004414:3(44)Online publication date: 27-Aug-2024
    • (2024)PowerScout: Security-Oriented Power Delivery Network Modeling for Side-Channel Vulnerability AnalysisIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2023.325782612:2(532-545)Online publication date: Apr-2024
    • (2020)Voltage-Stacked Power Delivery Systems: Reliability, Efficiency, and Power ManagementIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.296960739:12(5142-5155)Online publication date: Dec-2020
    • (2019)Reusing Leakage Current for Improved Energy Efficiency of Multi-Voltage Systems2019 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2019.8702425(1-5)Online publication date: May-2019
    • (2018)Efficient and reliable power delivery in voltage-stacked manycore system with hybrid charge-recycling regulatorsProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196037(1-6)Online publication date: 24-Jun-2018
    • (2018)Voltage-stacked GPUsProceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2018.00039(390-402)Online publication date: 20-Oct-2018
    • (2018)Efficient and Reliable Power Delivery in Voltage-Stacked Manycore System with Hybrid Charge-Recycling Regulators2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)10.1109/DAC.2018.8465914(1-6)Online publication date: Jun-2018
    • (2017)A 16-Core Voltage-Stacked System With Adaptive Clocking and an Integrated Switched-Capacitor DC–DC ConverterIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.263380525:4(1271-1284)Online publication date: 1-Apr-2017
    • (2015)Transient voltage noise in charge-recycled power delivery networks for many-layer 3D-IC2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)10.1109/ISLPED.2015.7273506(152-158)Online publication date: Jul-2015

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