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RRAM-based FPGA for "normally off, instantly on" applications

Published: 04 July 2012 Publication History

Abstract

"Normally off, instantly on" applications are becoming common in our environment. They range from healthcare to video surveillance. As the number of applications and their associated performance requirements grow rapidly, more and more powerful, flexible and power efficient computing units are necessary. In such a context, Field Programmable Gate Arrays (FPGA) architectures present a good trade-off between performance and flexibility. However, they consume high static power and can hardly be associated with power gating techniques due to their long context restoring phase. In this paper, we propose to integrate non-volatile resistive memories in configuration cells in order to instantly restore the FPGA context. We then show that if the circuit is in 'ON' state for less than 42% of time, non-volatile FPGA starts saving energy compared to classical FPGA. Finally, for a typical application with only 1% of time spent in 'ON' state, the energy gain reaches 50%.

References

[1]
X. Tian and K. Benkrid, "High-Performance Quasi-Monte Carlo Financial Simulation FPGA vs. GPP vs. GPU," ACM Transactions on Reconfigurable Technology and Systems, vol. 3, no. 4, pp. 1--22, Nov. 2010.
[2]
B. S. Deepaksubramanyan and A. Nu, "Analysis of Subthreshold Leakage Reduction in CMOS Digital Circuits," 50th Midwest Symposium on Circuits and Systems, no. 1, pp. 1--8, 2007.
[3]
M. H. Chowdhury, P. Khaled, and J. Gjanci, "An Innovative Power-Gating Technique for Leakage and Ground Bounce Control in System-on-a-Chip (SOC)," Circuits, Systems, and Signal Processing, vol. 30, no. 1, pp. 89--105, Nov. 2010.
[4]
S. Hauck and A. DeHon, Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation. Morgan Kaufmann Pub, 2008, p. 908.
[5]
M. Lin, A. E. Gamal, Y.-chang Lu, and S. Wong, "Performance Benefits of Monolithically Stacked 3-D FPGA," Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 26, no. 2, pp. 216--229, 2007.
[6]
K. J. Han et al., "A Novel Flash-based FPGA Technology with Deep Trench Isolation," Non-Volatile Semiconductor Memory Workshop, 2007 22nd IEEE, pp. 32--33.
[7]
"Actel IGLOO - The ultra-low-power programmable solution." {Online}. Available: http://www.actel.com/products/igloo/default.aspx.
[8]
"LatticeXP Non-Volatile FPGA," 2012. {Online}. Available: http://www.latticesemi.com/products/maturedevices/xp/index.cfm.
[9]
"Xilinx Spartan™-3AN FPGAs." {Online}. Available: http://www.xilinx.com/publications/prod_mktg/pn002011.pdf.
[10]
ITRS, "International Technology Roadmap For Semiconductors 2011 Edition Executive Summary," 2011.
[11]
P.-E. Gaillardon, M. H. Ben-jamaa, G. B. Beneventi, F. Clermidy, and L. Pemiola, "Emerging Memory Technologies for Reconfigurable Routing in FPGA Architecture," in Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on, 2010, pp. 62--65.
[12]
S. Onkaraiah et al., "Using OxRRAM Memories for Improving Communications of Reconfigurable FPGA Architectures," in Nanoscale Architectures (NANOARCH), 2011 IEEE/ACM International Symposium on, 2011, pp. 65--69.
[13]
Y. Y. Liauw, Z. Zhang, W. Kim, A. E. Gamal, and S. S. Wong, "Nonvolatile 3D-FPGA With Monolithically Stacked RRAM-Based Configuration Memory," Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International, pp. 406--408.
[14]
J. Cong and B. Xiao, "mrFPGA: A Novel FPGA Architecture with Memristor-Based Reconfiguration," in Nanoscale Architectures (NANOARCH), 2011 IEEE/ACM International Symposium on, 2011, pp. 1--8.
[15]
Y. Chen, J. Zhao, and Y. Xie, "3D-NonFAR: Three-dimensional non-volatile FPGA architecture using phase change memory," in Low-Power Electronics and Design (ISLPED), 2010 ACM/IEEE International Symposium on, 2010, pp. 55--60.
[16]
S. Tanachutiwat, M. Liu, and W. Wang, "FPGA Based on Integration of CMOS and RRAM," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 19, no. 11, pp. 2023--2032, Nov. 2011.
[17]
Y. Meng, T. Sherwood, and R. Kastner, "Leakage power reduction of embedded memories on FPGAs through location assignment," 2006 43rd ACM/IEEE Design Automation Conference, pp. 612--617, 2006.
[18]
D. Lewis et al., "Architectural Enhancements in Stratix-III ™ and Stratix-IV ™," in Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays (FPGA '09). ACM, New York, NY, USA, 2009, pp. 33--42.
[19]
F. Li, Y. Lin, L. He, and J. Cong, "Low-power FPGA using predefined dual-Vdd/dual-Vt fabrics," in Proceeding of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays - FPGA '04, ACM, New York, NY, USA, 2004, pp. 42--50.
[20]
S. Onkaraiah, M. Reyboz, C.-leti Minatec, M. Bocquet, C. Anghel, and A. Amara, "Bipolar ReRAM Based Non!Volatile Flip!flops for Low-Power Architectures," in NEWCAS, 2012, pp. 1--4, Accepted.
[21]
Hraziia et al., "Bipolar OxRRAM-based non-volatile 8T2R SRAM for information back-up," in EUROSOI, 2011, vol. 2, pp. 2--3.
[22]
J.-M. Chabloz, "Globally-Ratiochronous, Locally-Synchronous Systems," Electronic Systems, KTH, 2012.
[23]
R. Waser and M. Aono, "Nanoionics-based resistive switching memories.," Nature materials, vol. 6, no. 11, pp. 833--40, Nov. 2007.
[24]
S. Seo et al., "Reproducible resistance switching in polycrystalline NiO films," Applied Physics Letters, vol. 85, no. 23, p. 5655, 2004.
[25]
W. G. Kim et al., "Dependence of the switching characteristics of resistance random access memory on the type of transition metal oxide," in 2010 Proceedings of the European Solid State Device Research Conference, 2010, pp. 400--403.
[26]
H.-S. Ahn, S. Han, and C. S. Hwang, "Pairing of cation vacancies and gap-state creation in TiO2 and HfO2," APPL PHYS LETT90252908, vol. 90, no. 25, p. 252908, 2007.
[27]
H. Y. Lee et al., "Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM," 2008 IEEE International Electron Devices Meeting, pp. 1--4, 2008.
[28]
P. Jamieson, W. Luk, S. J. E. Wilton, and G. A. Constantinides, "An Energy and Power Consumption Analysis of FPGA Routing Architectures," in Field-Programmable Technology, 2009. FPT 2009. International Conference on, 2009, pp. 324--327.
[29]
Kara K. W. Poon, S. J. E. Wilton, and A. Yan, "A detailed power model for field-programmable gate arrays," ACM Trans. Des. Autom. Electron. Syst., vol. 10, no. 2, pp. 279--302, 2005.
[30]
J. Lamoureux and S. J. E. Wilton, "ACTIVITY ESTIMATION FOR FIELD-PROGRAMMABLE GATE ARRAYS," in Field Programmable Logic and Applications, 2006. FPL '06. International Conference on, 2006, pp. 28--30.
[31]
Berkeley Logic Synthesis and Verification Group, "ABC: A System for Sequential Synthesis and Verification," Release 70930, 2007. {Online}. Available: http://www.eecs.berkeley.edu/~alanmi/abc/.

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cover image ACM Conferences
NANOARCH '12: Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures
July 2012
243 pages
ISBN:9781450316712
DOI:10.1145/2765491
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 04 July 2012

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Author Tags

  1. FPGA
  2. NVSRAM
  3. OxRRAM
  4. leakage reduction
  5. nonvolatile memory
  6. power gating
  7. resistive RAM

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  • (2024)IntroductionFPGA EDA10.1007/978-981-99-7755-0_1(3-22)Online publication date: 1-Feb-2024
  • (2023)Process-Voltage-Temperature Variations Assessment in Energy-Aware Resistive RAM-Based FPGAsIEEE Transactions on Device and Materials Reliability10.1109/TDMR.2023.325901523:3(328-336)Online publication date: Sep-2023
  • (2023)Design of a Nonvolatile-Neural-Network-Accelerator-Embedded Edge-IoT Device and Its Hardware Emulation2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)10.1109/MCSoC60832.2023.00063(379-385)Online publication date: 18-Dec-2023
  • (2023)9T1R nvSRAM Cell with Improved Read Delay and MarginAdvanced IoT Sensors, Networks and Systems10.1007/978-981-99-1312-1_19(245-258)Online publication date: 25-Jun-2023
  • (2022)An 8kb RRAM-Based Nonvolatile SRAM with Pre-Decoding and Fast Storage/Restoration TimeApplied Sciences10.3390/app1301053113:1(531)Online publication date: 30-Dec-2022
  • (2022)MS 8T1M nvSRAM Cell with Improved Write Performance2022 International Mobile and Embedded Technology Conference (MECON)10.1109/MECON53876.2022.9752160(425-429)Online publication date: 10-Mar-2022
  • (2022)Via-Switch FPGA: 65-nm CMOS Implementation and EvaluationIEEE Journal of Solid-State Circuits10.1109/JSSC.2021.311726057:7(2250-2262)Online publication date: Jul-2022
  • (2022)A Novel RRAM-based FPGA architecture with Improved Performance and Optimization Parameters2022 IEEE 19th India Council International Conference (INDICON)10.1109/INDICON56171.2022.10040133(1-5)Online publication date: 24-Nov-2022
  • (2022)Design and Analysis of Two Low Power SRAM Cell Structures2022 2nd International Conference on Artificial Intelligence and Signal Processing (AISP)10.1109/AISP53593.2022.9760587(1-7)Online publication date: 12-Feb-2022
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