Ahmad Hassan
ABSTRACT
Increasingly large amounts of data are stored in main memory of data center servers. However, DRAM-based memory is an important consumer of energy and is unlikely to scale in the future. Various byte-addressable non-volatile memory (NVM) technologies promise high density and near-zero static energy, however they suffer from increased latency and increased dynamic energy consumption.
This paper proposes to leverage a hybrid memory architecture, consisting of both DRAM and NVM, by novel, application-level data management policies that decide to place data on DRAM vs. NVM. We analyze modern column-oriented and key-value data stores and demonstrate the feasibility of application-level data management. Cycle-accurate simulation confirms that our methodology reduces the energy with least performance degradation as compared to the current state-of-the-art hardware or OS approaches. Moreover, we utilize our techniques to apportion DRAM and NVM memory sizes for these workloads.
- L. A. Barroso and U. Hölzle. The datacenter as a computer: An introduction to the design of warehouse-scale machines. Synthesis Lectures on Computer Architecture, 4(1):1--108, 2009.Google Scholar
Cross Ref
- N. Binkert, et al. The GEM5 simulator. SIGARCH Comput. Archit. News, 39(2):1--7, Aug. 2011. Google ScholarDigital Library
- P. A. Boncz, M. L. Kersten, and S. Manegold. Breaking the memory wall in MonetDB. Commun. ACM, 51(12):77--85, Dec. 2008. Google ScholarDigital Library
- P. A. Boncz, S. Manegold and M. L. Kersten. Database Architecture Optimized for the New Bottleneck: Memory Access, VLDB 1999 Google ScholarDigital Library
- D. Burger and T. M. Austin. The simplescalar tool set, version 2.0. SIGARCH Comput. Archit. News, 25(3):13--25, June 1997. Google ScholarDigital Library
- J.-H. Choi et al. OPAMP: Evaluation framework for optimal page allocation of hybrid main memory architecture. In ICPADS, pages 620--627, 2012. Google ScholarDigital Library
- B. F. Cooper et al. Benchmarking cloud serving systems with YCSB. In SoCC, pages 143--154, 2010. Google ScholarDigital Library
- G. Dhiman, R. Ayoub, and T. Rosing. PDRAM: A hybrid PRAM and DRAM main memory system. In DAC, pages 664--469, 2009. Google ScholarDigital Library
- M. Ferdman et al. Clearing the clouds: A study of emerging scale-out workloads on modern hardware. In ASPLOS, pages 37--48, 2012. Google ScholarDigital Library
- B. Fitzpatrick. Distributed caching with memcached. Linux J., 2004(124):5, Aug. 2004. Google ScholarDigital Library
- A. Hassan, H. Vandierendonck, and D. S. Nikolopoulos, Software-Managed Energy-Efficient Hybrid DRAM/NVM Main Memory. In Computing Frontiers, to appear, 2015. Google ScholarDigital Library
- Y. Ho, G. M. Huang, and P. Li. Nonvolatile memristor memory: Device characteristics and design implications. In DAC, pages 485--490, 2009. Google ScholarDigital Library
- ITRS. International Technology Roadmap for Semiconductors, 2011.Google Scholar
- B. C. Lee, E. Ipek, O. Mutlu, and D. Burger. Architecting phase change memory as a scalable DRAM alternative. In ISCA, pages 2--13, 2009. Google ScholarDigital Library
- C. Lefurgy, K. Rajamani, F. Rawson, W. Felter, M. Kistler, and T. Keller. Energy management for commercial servers. Computer, 36(12):39--48, 2003. Google ScholarDigital Library
- E. Doller, "Forging a future in memory - new technologies, new markets, new applications," in Hot Chips Tutorials, 2010.Google Scholar
- D. Li et al. Identifying opportunities for byte-addressable non-volatile memory in extreme-scale scientific applications. In IPDPS, pages 945--956, 2012. Google ScholarDigital Library
- E. Kultursay, M. Kandemir, A. Sivasubramaniam, O. Mutlu. Evaluating STT-RAM as an Energy-Efficient Main Memory Alternative In ISPASS, 2013.Google Scholar
- The LLVM compiler infrastructure. http://llvm.org.Google Scholar
- D. Meisner, B. T. Gold, and T. F. Wenisch. Powernap: eliminating server idle power. In ASPLOS, pages 205--216, 2009. Google ScholarDigital Library
- Micron TN-41-01: Calculating Memory System Power http://www.micron.com/products/support/power-calcGoogle Scholar
- M. K. Qureshi, V. Srinivasan, and J. A. Rivers. Scalable high performance main memory system using phase-change memory technology. In ISCA, pages 24--33, 2009. Google ScholarDigital Library
- L. E. Ramos, E. Gorbatov, and R. Bianchini. Page placement in hybrid memory systems. In ICS, pages 85--95, 2011. Google ScholarDigital Library
- S. Rul, H. Vandierendonck, and K. De Bosschere. A profile-based tool for finding pipeline parallelism in sequential programs. Parallel Comput., 36(9):531--551, Sept. 2010. Google ScholarDigital Library
- D.-J. Shin et al. Adaptive page grouping for energy efficiency in hybrid PRAM-DRAM main memory. In RACS, pages 395--402, 2012. Google ScholarDigital Library
- Transaction processing performance council. http://www.tpc.org.Google Scholar
- H. Yoon. Row buffer locality aware caching policies for hybrid memories. In Intl. Conf. on Computer Design (ICCD), pages 337--344, 2012. Google ScholarDigital Library
- P. Zhou, B. Zhao, J. Yang, and Y. Zhang. A durable and energy efficient main memory using phase change memory technology. In ISCA, pages 14--23, 2009. Google ScholarDigital Library
- H. Vandierendonck, A. Hassan, and D. Nikolopoulos. On the energy-efficiency of byte-addressable non-volatile memory. Comput. Archit. Letters, PP(99):1--1, 2014.Google Scholar
- X. Dong, et al. NVSim: A circuit-level performance, energy, and area model for emerging nonvolatile memory. TCAD, 31(7):994--1007, July 2012. Google ScholarDigital Library
- S. Chen and Q. Jin. Persistent B+-trees in Non-volatile Main Memory. Proc. VLDB Endow., 8(7):786--797, February 2015. Google ScholarDigital Library
- S. D. Viglas. Write-limited Sorts and Joins for Persistent Memory. Proc. VLDB Endow., 7(5):413--424, Janary 2014. Google ScholarDigital Library
- S. Pelley et al. Storage Management in the NVRAM Era. Proc. VLDB Endow., 7(2):121--132, October 2013. Google ScholarDigital Library
- S. Chen, P. B. Gibbons and S. Nath. Rethinking database algorithms for phase change memory. CIDR 2011Google Scholar
- J. Guerra et al. Software persistent memory Proceedings of the 2012 USENIX conference on Annual Technical Conference Google ScholarDigital Library
- A. Mirhoseini, M. Potkonjak and F. Koushanfar. Coding-based Energy Minimization for Phase Change Memory Proceedings of the 49th Annual Design Automation Conference Google ScholarDigital Library
Index Terms
- Energy-Efficient In-Memory Data Stores on Hybrid Memory Hierarchies
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