research-article

A Finite-Point Method for Efficient Gate Characterization Under Multiple Input Switching

Authors:

Anupama R. Subramaniam,

Yu CaoAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 21, Issue 1

Article No.: 10, Pages 1 - 25

https://doi.org/10.1145/2778970

Published: 02 December 2015 Publication History

Abstract

Timing characterization of standard cells is one of the essential steps in VLSI design. The traditional static timing analysis (STA) tool assumes single input switching models for the characterization of multiple input gates. However, due to technology scaling, increasing operating frequency, and process variation, the probability of the occurrence of multiple input switching (MIS) is increasing. On the other hand, considering all possible MIS scenarios for the characterization of multiple input logic gates, is computationally intensive. To improve the efficiency, this work proposes a finite-point-based characterization methodology for multiple input gates with the effects of MIS. Furthermore, delay variation due to MIS is integrated into the STA flow through propagation of switching windows. The proposed modeling methodology is validated using benchmark circuits at the 45nm technology node for various operating conditions. Experimental results demonstrate significant reduction in computation cost and data volume with less than ∼10% error compared to that of traditional SPICE simulation.

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Cited By

Ferdowsi AFügger MNowak TSchmid UDrmota M(2025)Faithful dynamic timing analysis of digital circuits using continuous thresholded mode-switched ODEsNonlinear Analysis: Hybrid Systems10.1016/j.nahs.2024.10157256(101572)Online publication date: May-2025
https://doi.org/10.1016/j.nahs.2024.101572
Zhang HLiang HWang YLi DShao ZYi MLu YHuang Z(2024)Multi-transition delay test for improving the coverage of cell internal defectsIEICE Electronics Express10.1587/elex.21.2024032621:15(20240326-20240326)Online publication date: 10-Aug-2024
https://doi.org/10.1587/elex.21.20240326
Jiang HCheng XCao P(2023)Multiple-Input Switching Modeling with Graph Neural Network2023 International Symposium of Electronics Design Automation (ISEDA)10.1109/ISEDA59274.2023.10218616(428-432)Online publication date: 8-May-2023
https://doi.org/10.1109/ISEDA59274.2023.10218616
Show More Cited By

Index Terms

A Finite-Point Method for Efficient Gate Characterization Under Multiple Input Switching
1. Computing methodologies
  1. Modeling and simulation
    1. Model development and analysis
      1. Modeling methodologies

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 21, Issue 1

November 2015

464 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/2852253

Editor:
Naehyuck Chang
Korea Advanced Institute of Science and Technology, Korea

Issue’s Table of Contents

Copyright © 2015 ACM.

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Association for Computing Machinery

New York, NY, United States

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 02 December 2015

Accepted: 01 May 2015

Revised: 01 November 2012

Received: 01 July 2012

Published in TODAES Volume 21, Issue 1

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Cited By

Ferdowsi AFügger MNowak TSchmid UDrmota M(2025)Faithful dynamic timing analysis of digital circuits using continuous thresholded mode-switched ODEsNonlinear Analysis: Hybrid Systems10.1016/j.nahs.2024.10157256(101572)Online publication date: May-2025
https://doi.org/10.1016/j.nahs.2024.101572
Zhang HLiang HWang YLi DShao ZYi MLu YHuang Z(2024)Multi-transition delay test for improving the coverage of cell internal defectsIEICE Electronics Express10.1587/elex.21.2024032621:15(20240326-20240326)Online publication date: 10-Aug-2024
https://doi.org/10.1587/elex.21.20240326
Jiang HCheng XCao P(2023)Multiple-Input Switching Modeling with Graph Neural Network2023 International Symposium of Electronics Design Automation (ISEDA)10.1109/ISEDA59274.2023.10218616(428-432)Online publication date: 8-May-2023
https://doi.org/10.1109/ISEDA59274.2023.10218616
Ferdowsi ASchmid USalzmann J(2023)Accurate Hybrid Delay Models for Dynamic Timing Analysis2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323646(1-9)Online publication date: 28-Oct-2023
https://doi.org/10.1109/ICCAD57390.2023.10323646
Ferdowsi AFügger MSalzmann JSchmid U(2023)A Hybrid Delay Model for Interconnected Multi-Input Gates2023 26th Euromicro Conference on Digital System Design (DSD)10.1109/DSD60849.2023.00060(381-390)Online publication date: 6-Sep-2023
https://doi.org/10.1109/DSD60849.2023.00060
Ferdowsi AMaier JÖhlinger DSchmid UBolchini CO'Connor IVerbauwhede IWille R(2022)A simple hybrid model for accurate delay modeling of a multi-input gateProceedings of the 2022 Conference & Exhibition on Design, Automation & Test in Europe10.5555/3539845.3540184(1461-1466)Online publication date: 14-Mar-2022
https://dl.acm.org/doi/10.5555/3539845.3540184
Ferdowsi AMaier JOhlinger DSchmid U(2022)A Simple Hybrid Model for Accurate Delay Modeling of a Multi-Input Gate2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE54114.2022.9774547(1461-1466)Online publication date: 14-Mar-2022
https://doi.org/10.23919/DATE54114.2022.9774547
Shashank Ram OSaurabh S(2021)Modeling Multiple-Input Switching in Timing Analysis Using Machine LearningIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.300962440:4(723-734)Online publication date: Apr-2021
https://doi.org/10.1109/TCAD.2020.3009624

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