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MapPro: Proactive Runtime Mapping for Dynamic Workloads by Quantifying Ripple Effect of Applications on Networks-on-Chip

Published: 28 September 2015 Publication History

Abstract

Increasing dynamic workloads running on NoC-based many-core systems necessitates efficient runtime mapping strategies. With an unpredictable nature of application profiles, selecting a rational region to map an incoming application is an NP-hard problem in view of minimizing congestion and maximizing performance. In this paper, we propose a proactive region selection strategy which prioritizes nodes that offer lower congestion and dispersion. Our proposed strategy, MapPro, quantitatively represents the propagated impact of spatial availability and dispersion on the network with every new mapped application. This allows us to identify a suitable region to accommodate an incoming application that results in minimal congestion and dispersion. We cluster the network into squares of different radii to suit applications of different sizes and proactively select a suitable square for a new application, eliminating the overhead caused with typical reactive mapping approaches. We evaluated our proposed strategy over different traffic patterns and observed gains of up to 41% in energy efficiency, 28% in congestion and 21% dispersion when compared to the state-of-the-art region selection methods.

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Cited By

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  • (2024)High-performance application mapping in network-on-chip-based multicore systemsThe Journal of Supercomputing10.1007/s11227-024-06184-980:13(18573-18599)Online publication date: 1-Sep-2024
  • (2023)Run-Time Resource Management in CMPs Handling Multiple Aging MechanismsIEEE Transactions on Computers10.1109/TC.2023.327280072:10(2872-2887)Online publication date: Oct-2023
  • (2023)A Survey on Dynamic Application Mapping Approaches for Real-Time Network-on-Chip-Based PlatformsIEEE Access10.1109/ACCESS.2023.332923311(122694-122721)Online publication date: 2023
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cover image ACM Conferences
NOCS '15: Proceedings of the 9th International Symposium on Networks-on-Chip
September 2015
233 pages
ISBN:9781450333962
DOI:10.1145/2786572
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 28 September 2015

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Author Tags

  1. Application mapping
  2. On-chip many-core systems
  3. Proactive Runtime Mapping
  4. Task allocation

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  • Research-article
  • Research
  • Refereed limited

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NOCS '15
NOCS '15: International Symposium on Networks-on-Chip
September 28 - 30, 2015
BC, Vancouver, Canada

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Overall Acceptance Rate 14 of 44 submissions, 32%

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Cited By

View all
  • (2024)High-performance application mapping in network-on-chip-based multicore systemsThe Journal of Supercomputing10.1007/s11227-024-06184-980:13(18573-18599)Online publication date: 1-Sep-2024
  • (2023)Run-Time Resource Management in CMPs Handling Multiple Aging MechanismsIEEE Transactions on Computers10.1109/TC.2023.327280072:10(2872-2887)Online publication date: Oct-2023
  • (2023)A Survey on Dynamic Application Mapping Approaches for Real-Time Network-on-Chip-Based PlatformsIEEE Access10.1109/ACCESS.2023.332923311(122694-122721)Online publication date: 2023
  • (2020)Thermal-cycling-aware dynamic reliability management in many-core system-on-chipProceedings of the 23rd Conference on Design, Automation and Test in Europe10.5555/3408352.3408632(1229-1234)Online publication date: 9-Mar-2020
  • (2020)Thermal-Cycling-aware Dynamic Reliability Management in Many-Core System-on-Chip2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE48585.2020.9116325(1229-1234)Online publication date: Mar-2020
  • (2020)Performance Evaluation of Application Mapping Approaches for Network-on-Chip DesignsIEEE Access10.1109/ACCESS.2020.29826758(63607-63631)Online publication date: 2020
  • (2019)Toward On-chip Network Security Using Runtime Isolation MappingACM Transactions on Architecture and Code Optimization10.1145/333777016:3(1-25)Online publication date: 20-Jul-2019
  • (2019)A Lifetime Reliability-Constrained Runtime Mapping for Throughput Optimization in Many-Core SystemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.285516838:9(1771-1784)Online publication date: Sep-2019
  • (2018)Exploiting dark cores for performance optimization via patterning for many-core chips in the dark silicon eraProceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip10.5555/3306619.3306636(1-8)Online publication date: 4-Oct-2018
  • (2018)Bubble Budgeting: Throughput Optimization for Dynamic Workloads by Exploiting Dark Cores in Many Core SystemsIEEE Transactions on Computers10.1109/TC.2017.273596767:2(178-192)Online publication date: 1-Feb-2018
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