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Simulation environment for a vision-system-on-chip with integrated processing

Published: 08 September 2015 Publication History

Abstract

Imagers with programmable, highly parallel signal processing execute computationally intensive processing steps directly on the sensor, thereby allowing early reduction of the amount of data to relevant features. For the purposes of architectural exploration during development of a novel Vision-System-on-Chip (VSoC), it has been modelled on system level. Aside from the integrated control unit with multiple independent control flows, the model also realises digital and analogue signal processing. Due to high simulation speed and compatibility with the real system, especially regarding the programs to be executed, the resulting simulation model is very well suited for usage during application development. By providing the ability to purposefully introduce parameter deviations or defects at various points of analogue processing, it becomes possible to study them with respect to their influence on image processing algorithms executed within the VSoC.

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Cited By

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  • (2022)Event camera simulator design for modeling attention-based inference architecturesJournal of Real-Time Image Processing10.1007/s11554-021-01191-y19:2(363-374)Online publication date: 5-Jan-2022
  • (2016)Hardware-aware performance evaluation for the co-design of image sensors and vision algorithms2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)10.1109/SMACD.2016.7520722(1-4)Online publication date: Jun-2016

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cover image ACM Other conferences
ICDSC '15: Proceedings of the 9th International Conference on Distributed Smart Cameras
September 2015
225 pages
ISBN:9781450336819
DOI:10.1145/2789116
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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  • Escuela Técnica superier de Ingeniería Informática, Universidad de Seville, Spain: Escuela Técnica superier de Ingeniería Informática, Universidad de Seville, Spain

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 08 September 2015

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Author Tags

  1. ASIP
  2. image sensor
  3. simulation model
  4. systemc
  5. vsoc

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ICDSC '15
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  • Escuela Técnica superier de Ingeniería Informática, Universidad de Seville, Spain

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ICDSC '15 Paper Acceptance Rate 43 of 48 submissions, 90%;
Overall Acceptance Rate 92 of 117 submissions, 79%

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Cited By

View all
  • (2022)Event camera simulator design for modeling attention-based inference architecturesJournal of Real-Time Image Processing10.1007/s11554-021-01191-y19:2(363-374)Online publication date: 5-Jan-2022
  • (2016)Hardware-aware performance evaluation for the co-design of image sensors and vision algorithms2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)10.1109/SMACD.2016.7520722(1-4)Online publication date: Jun-2016

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