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Coarse-Grained Architecture for Fingerprint Matching

Published: 17 December 2015 Publication History

Abstract

Fingerprint matching is a key procedure in fingerprint identification applications. The minutiae-based fingerprint matching algorithm is one of the most typical algorithms achieving a reasonably correct recognition rate. This study proposes a coarse-grained parallel architecture called fingerprint matching core (FMC) to accelerate fingerprint matching. The proposed architecture has a two-level parallel structure (i.e., parallel among groups (PAG) and parallel in group (PIG)). A multirequest controller is added to the PAG structure to obtain a concurrent operation of the multiple processing element group (PEG). The DDR3 controller is used in the PIG structure to read eight minutiae from eight different fingerprints and realize the simultaneous computation of the eight PEs. The whole system is implemented on a Xilinx FPGA board with a Virtex VII XC7VX485T chip. The 16-PEG FMC achieves a throughput of about 9.63 million fingerprint pairs per second, which is larger than that achieved on a Tesla K20c platform. The software execution times are also measured on the 2.93GHz Intel Xeon 5670, 2.3GHz AMD Opteron(tm) Processor 6376, and Tesla K20c platforms. The Intel Xeon 5670 has two processors with 12 cores, and the AMD Opteron(tm) Processor 6376 has two processors with 16 cores. Moreover, the throughput is about 31 times that achieved on a 2.93GHz Intel Xeon 5670 single core.

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Cited By

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  • (2020)Accelerating fingerprint identification using FPGA for large-scale applicationsJournal of Parallel and Distributed Computing10.1016/j.jpdc.2020.03.007141(35-48)Online publication date: Jul-2020
  • (2019)A Survey of the Methods on Fingerprint Orientation Field EstimationIEEE Access10.1109/ACCESS.2019.29036017(32644-32663)Online publication date: 2019

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Published In

cover image ACM Transactions on Reconfigurable Technology and Systems
ACM Transactions on Reconfigurable Technology and Systems  Volume 9, Issue 2
Special Section on RAW2014
February 2016
146 pages
ISSN:1936-7406
EISSN:1936-7414
DOI:10.1145/2854101
  • Editor:
  • Steve Wilton
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 17 December 2015
Accepted: 01 June 2015
Revised: 01 May 2015
Received: 01 November 2014
Published in TRETS Volume 9, Issue 2

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Author Tags

  1. FPGA
  2. Fingerprint matching
  3. coarse-grained parallel
  4. minutia
  5. parallel among groups
  6. parallel in group
  7. processing element
  8. processing element group

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  • Research-article
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  • Refereed

Funding Sources

  • National High Technology Research and Development Program of China
  • National Science Foundation of China

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Cited By

View all
  • (2020)Accelerating fingerprint identification using FPGA for large-scale applicationsJournal of Parallel and Distributed Computing10.1016/j.jpdc.2020.03.007141(35-48)Online publication date: Jul-2020
  • (2019)A Survey of the Methods on Fingerprint Orientation Field EstimationIEEE Access10.1109/ACCESS.2019.29036017(32644-32663)Online publication date: 2019

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