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RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators

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Published:13 September 2015Publication History
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Abstract

We present RIFFA 2.1, a reusable integration framework for Field-Programmable Gate Array (FPGA) accelerators. RIFFA provides communication and synchronization for FPGA accelerated applications using simple interfaces for hardware and software. Our goal is to expand the use of FPGAs as an acceleration platform by releasing, as open source, a framework that easily integrates software running on commodity CPUs with FPGA cores. RIFFA uses PCI Express (PCIe) links to connect FPGAs to a CPU’s system bus. RIFFA 2.1 supports FPGAs from Xilinx and Altera, Linux and Windows operating systems, and allows multiple FPGAs to connect to a single host PC system. It has software bindings for C/C++, Java, Python, and Matlab. Tests show that data transfers between hardware and software can reach 97% of the achievable PCIe link bandwidth.

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  1. RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators

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      • Published in

        cover image ACM Transactions on Reconfigurable Technology and Systems
        ACM Transactions on Reconfigurable Technology and Systems  Volume 8, Issue 4
        October 2015
        134 pages
        ISSN:1936-7406
        EISSN:1936-7414
        DOI:10.1145/2822909
        • Editor:
        • Steve Wilton
        Issue’s Table of Contents

        Copyright © 2015 ACM

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        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 13 September 2015
        • Accepted: 1 January 2015
        • Revised: 1 November 2014
        • Received: 1 July 2014
        Published in trets Volume 8, Issue 4

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