Abstract
We present RIFFA 2.1, a reusable integration framework for Field-Programmable Gate Array (FPGA) accelerators. RIFFA provides communication and synchronization for FPGA accelerated applications using simple interfaces for hardware and software. Our goal is to expand the use of FPGAs as an acceleration platform by releasing, as open source, a framework that easily integrates software running on commodity CPUs with FPGA cores. RIFFA uses PCI Express (PCIe) links to connect FPGAs to a CPU’s system bus. RIFFA 2.1 supports FPGAs from Xilinx and Altera, Linux and Windows operating systems, and allows multiple FPGAs to connect to a single host PC system. It has software bindings for C/C++, Java, Python, and Matlab. Tests show that data transfers between hardware and software can reach 97% of the achievable PCIe link bandwidth.
- R. Brodersen, A. Tkachenko, and H. Kwok-Hay So. 2006. A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH. In CODES+ISSS’06.Google Scholar
- K. Eguro. 2010. SIRC: An extensible reconfigurable computing communication API. In FCCM, Ron Sass and Russell Tessier (Eds.). IEEE Computer Society, 135--138. Google ScholarDigital Library
- A. Goldhammer and J. Ayer, Jr. 2008. Understanding performance of PCI express systems. White Paper: Xilinx Virtex-4 and Virtex-5 FPGAs (2008).Google Scholar
- J. M III. 2009. Open Component Portability Infrastructure (OPENCPI).Google Scholar
- M. Jacobsen, Y. Freund, and R. Kastner. 2012. RIFFA: A reusable integration framework for FPGA accelerators. In Field-Programmable Custom Computing Machines (FCCM’12). IEEE, 216--219. Google ScholarDigital Library
- J. H. Kelm and S. S. Lumetta. 2008. HybridOS: Runtime support for reconfigurable accelerators. In FPGA. ACM, New York, 212--221. Google ScholarDigital Library
- W. Peck, E. K. Anderson, J. Agron, J. Stevens, F. Baijot, and D. L. Andrews. 2006. Hthreads: A computational model for reconfigurable devices. In FPL. IEEE, 1--4.Google Scholar
Index Terms
- RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators
Recommendations
RIFFA: A Reusable Integration Framework for FPGA Accelerators
FCCM '12: Proceedings of the 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing MachinesWe present RIFFA, a reusable integration framework for FPGA accelerators. RIFFA provides communication and synchronization for FPGA accelerated software using a standard interface. Our goal is to expand the use of FPGAs as an acceleration platform by ...
Performance-driven event-based synchronization for multi-FPGA simulation accelerator with event time-multiplexing bus
Simulation is the most viable solution for the functional verification of system-on-chip (SoC). The acceleration of simulation with multi-field programmable gate array (multi-FPGA) emulator is a promising method to comply with the increasing complexity ...
Scalable mpNoC for massively parallel systems - Design and implementation on FPGA
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device. These parallel systems require a cost-effective yet high-performance ...
Comments